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Searched refs:TIED_TO (Results 1 – 23 of 23) sorted by relevance

/openbsd/src/gnu/llvm/llvm/include/llvm/MC/
DMCInstrDesc.h36 TIED_TO = 0, // Must be allocated the same register as specified value. enumerator
42 ((1 << MCOI::TIED_TO) | ((op) << (4 + MCOI::TIED_TO * 4)))
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h1069 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
1074 Desc.getOperandConstraint(6, MCOI::TIED_TO) == 0) in getOperandBias()
1079 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
1080 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1) in getOperandBias()
1084 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
1085 (Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1 || in getOperandBias()
1086 Desc.getOperandConstraint(8, MCOI::TIED_TO) == 1)) in getOperandBias()
DX86InstComments.cpp271 if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1) in printMasking()
/openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/
DSystemZHazardRecognizer.cpp127 MID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in has4RegOps()
DSystemZShortenInst.cpp69 if (MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 && in tieOpsIfNeeded()
/openbsd/src/gnu/llvm/llvm/tools/llvm-exegesis/lib/
DMCInstrDescView.cpp121 int TiedToIndex = Description->getOperandConstraint(OpIndex, MCOI::TIED_TO); in create()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGSDNodes.cpp217 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1) in ClusterNeighboringLoads()
455 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in AddSchedEdges()
DScheduleDAGFast.cpp252 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in CopyAndMoveSuccessors()
DScheduleDAGRRList.cpp1039 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in TryUnfoldSU()
2850 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) { in canClobber()
3090 if (MCID.getOperandConstraint(j+NumRes, MCOI::TIED_TO) == -1) in AddPseudoTwoAddrDeps()
DInstrEmitter.cpp359 bool isTied = MCID.getOperandConstraint(Idx, MCOI::TIED_TO) != -1; in AddRegisterOperand()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DTargetInstrInfo.cpp204 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
209 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
DMachineInstr.cpp265 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO); in addOperand()
1506 int ExpectedTiedIdx = MCID.getOperandConstraint(I, MCOI::TIED_TO); in hasComplexRegisterTies()
DMachineVerifier.cpp2022 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO); in visitMachineOperand()
2079 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO)) in visitMachineOperand()
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp530 assert(OpDesc.getOperandConstraint(Component::SRC0, MCOI::TIED_TO) == -1); in ComponentProps()
531 assert(OpDesc.getOperandConstraint(Component::SRC1, MCOI::TIED_TO) == -1); in ComponentProps()
532 auto TiedIdx = OpDesc.getOperandConstraint(Component::SRC2, MCOI::TIED_TO); in ComponentProps()
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.cpp691 MCOI::OperandConstraint::TIED_TO); in getInstruction()
804 OldIdx, MCOI::OperandConstraint::TIED_TO) == -1) { in isMacDPP()
808 MCOI::OperandConstraint::TIED_TO) == DST_IDX); in isMacDPP()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
DUtils.cpp190 int DefIdx = I.getDesc().getOperandConstraint(OpI, MCOI::TIED_TO); in constrainSelectedInstRegOperands()
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp6418 Desc.getOperandConstraint(Inst.getNumOperands(), MCOI::TIED_TO); in cvtDSImpl()
8085 MCOI::OperandConstraint::TIED_TO) == -1; in isRegOrImmWithInputMods()
8716 Desc.getOperandConstraint(OldIdx, MCOI::TIED_TO) == -1; in cvtVOP3DPP()
8739 MCOI::TIED_TO); in cvtVOP3DPP()
8805 MCOI::TIED_TO); in cvtDPP()
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86InstrInfo.cpp2651 MCOI::TIED_TO) != -1)) { in findCommutedOpIndices()
6112 NumOps > 1 && MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) != -1; in foldMemoryOperandImpl()
6227 0 == MI.getDesc().getOperandConstraint(CommuteOpIdx1, MCOI::TIED_TO); in foldMemoryOperandImpl()
6229 0 == MI.getDesc().getOperandConstraint(CommuteOpIdx2, MCOI::TIED_TO); in foldMemoryOperandImpl()
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp1178 assert(MI.getDesc().getOperandConstraint(0, MCOI::TIED_TO) && in commuteInstructionImpl()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1017 int TiedOp = MCID.getOperandConstraint(VCCPos + 3, MCOI::TIED_TO); in AddThumbPredicate()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp5255 (MCID.getOperandConstraint(i, MCOI::TIED_TO) == -1) && in validateInstruction()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp2508 int TiedOp = MCID.getOperandConstraint(NextOpIndex, MCOI::TIED_TO); in addVPTPredROperands()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMISelLowering.cpp12276 int DefIdx = MCID->getOperandConstraint(i, MCOI::TIED_TO); in AdjustInstrPostInstrSelection()