| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 386 unsigned SrcSubReg) { in shareSameRegisterFile() argument
393 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
394 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
400 if (!SrcSubReg) { in shareSameRegisterFile()
401 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
406 if (SrcSubReg) in shareSameRegisterFile()
407 return TRI.getMatchingSuperRegClass(SrcRC, DefRC, SrcSubReg) != nullptr; in shareSameRegisterFile()
416 unsigned SrcSubReg) const { in shouldRewriteCopySrc()
418 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
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| D | PeepholeOptimizer.cpp | 310 void addSource(Register SrcReg, unsigned SrcSubReg) { in addSource() argument
311 RegSrcs.push_back(RegSubRegPair(SrcReg, SrcSubReg)); in addSource()
314 void setSource(int Idx, Register SrcReg, unsigned SrcSubReg) { in setSource() argument
316 RegSrcs[Idx] = RegSubRegPair(SrcReg, SrcSubReg); in setSource()
1412 unsigned SrcSubReg = MI.getOperand(1).getSubReg(); in foldRedundantCopy() local
1420 RegSubRegPair SrcPair(SrcReg, SrcSubReg); in foldRedundantCopy()
1429 assert(SrcSubReg == PrevCopy->getOperand(1).getSubReg() && in foldRedundantCopy()
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| D | TailDuplicator.cpp | 356 unsigned SrcSubReg = MI->getOperand(SrcOpIdx).getSubReg(); in processPHI() local
358 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
363 Copies.push_back(std::make_pair(NewDef, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
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| D | PHIElimination.cpp | 441 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg(); in LowerPHINode() local
503 SrcReg, SrcSubReg, IncomingReg); in LowerPHINode()
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| D | RegisterCoalescer.cpp | 3952 unsigned SrcSubReg = 0, DstSubReg = 0; in applyTerminalRule() local
3953 if (!isMoveInstr(*TRI, &Copy, SrcReg, DstReg, SrcSubReg, DstSubReg)) in applyTerminalRule()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | GCNPreRAOptimizations.cpp | 120 Register SrcSubReg = I.getOperand(1).getSubReg(); in processReg() local
122 if (SrcSubReg != Def.getOperand(0).getSubReg()) in processReg()
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| D | SIRegisterInfo.h | 261 unsigned SrcSubReg) const override;
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| D | SIInstrInfo.h | 1108 unsigned SrcSubReg,
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| D | SIInstrInfo.cpp | 1023 Register SrcSubReg = RI.getSubReg(SrcReg, SubIdx); in copyPhysReg() local
1027 .addReg(SrcSubReg) in copyPhysReg()
1029 .addReg(SrcSubReg) in copyPhysReg()
8292 const DebugLoc &DL, Register Src, unsigned SrcSubReg, Register Dst) const { in createPHISourceCopy() argument
8303 .addReg(Src, 0, SrcSubReg) in createPHISourceCopy()
8306 return TargetInstrInfo::createPHISourceCopy(MBB, InsPt, DL, Src, SrcSubReg, in createPHISourceCopy()
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| D | SIRegisterInfo.cpp | 2838 unsigned SrcSubReg) const { in shouldRewriteCopySrc()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 76 unsigned SrcSubReg) const override;
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| D | X86RegisterInfo.cpp | 220 unsigned SrcSubReg) const { in shouldRewriteCopySrc()
225 SrcRC->hasSuperClassEq(&X86::GR64RegClass) && SrcSubReg == X86::sub_32bit) in shouldRewriteCopySrc()
229 SrcRC, SrcSubReg); in shouldRewriteCopySrc()
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| D | X86InstrInfo.cpp | 9060 Register SrcSubReg = TRI->getSubReg(SrcReg, SubRegIdx); in describeMOVrrLoadedValue() local
9061 return ParamLoadedValue(MachineOperand::CreateReg(SrcSubReg, false), Expr); in describeMOVrrLoadedValue()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 939 unsigned SrcSubReg) const { in shouldRewriteCopySrc()
943 (SrcSubReg == ARM::ssub_0 || SrcSubReg == ARM::ssub_1)) in shouldRewriteCopySrc()
947 SrcRC, SrcSubReg); in shouldRewriteCopySrc()
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| D | ARMBaseRegisterInfo.h | 243 unsigned SrcSubReg) const override;
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| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1958 unsigned SrcSubReg, in createPHISourceCopy() argument
1961 .addReg(Src, 0, SrcSubReg); in createPHISourceCopy()
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| D | TargetRegisterInfo.h | 621 unsigned SrcSubReg) const;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 8236 Register SrcSubReg = TRI->getSubReg(SrcReg, AArch64::sub_32); in describeORRLoadedValue() local
8237 return ParamLoadedValue(MachineOperand::CreateReg(SrcSubReg, false), Expr); in describeORRLoadedValue()
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