Searched refs:SecondReg (Results 1 – 5 of 5) sorted by relevance
| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 2258 Register &FirstReg, Register &SecondReg, Register &BaseReg, int &Offset, in CanFormLdStDWord() argument
2318 SecondReg = Op1->getOperand(0).getReg(); in CanFormLdStDWord()
2319 if (FirstReg == SecondReg) in CanFormLdStDWord()
2420 Register FirstReg, SecondReg; in RescheduleOps() local
2428 FirstReg, SecondReg, BaseReg, in RescheduleOps()
2436 MRI->constrainRegClass(SecondReg, TRC); in RescheduleOps()
2442 .addReg(SecondReg, RegState::Define) in RescheduleOps()
2456 .addReg(SecondReg) in RescheduleOps()
2473 MRI->setRegAllocationHint(FirstReg, ARMRI::RegPairEven, SecondReg); in RescheduleOps()
2474 MRI->setRegAllocationHint(SecondReg, ARMRI::RegPairOdd, FirstReg); in RescheduleOps()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 4385 unsigned SecondReg = Inst.getOperand(1).getReg(); in expandTrunc() local
4401 FirstReg, SecondReg, IDLoc, STI); in expandTrunc()
4409 FirstReg, SecondReg, IDLoc, STI); in expandTrunc()
5327 unsigned SecondReg = nextReg(FirstReg); in expandLoadStoreDMacro() local
5329 if (!SecondReg) in expandLoadStoreDMacro()
5348 TOut.emitRRX(Opcode, SecondReg, BaseReg, SecondOffset, IDLoc, STI); in expandLoadStoreDMacro()
5350 TOut.emitRRX(Opcode, SecondReg, BaseReg, SecondOffset, IDLoc, STI); in expandLoadStoreDMacro()
5374 unsigned SecondReg = nextReg(FirstReg); in expandStoreDM1Macro() local
5376 if (!SecondReg) in expandStoreDM1Macro()
5392 std::swap(FirstReg, SecondReg); in expandStoreDM1Macro()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 7751 MCRegister SecondReg; in tryParseGPRSeqPair() local
7752 Res = tryParseScalarRegister(SecondReg); in tryParseGPRSeqPair()
7759 if (RI->getEncodingValue(SecondReg) != FirstEncoding + 1 || in tryParseGPRSeqPair()
7760 (isXReg && !XRegClass.contains(SecondReg)) || in tryParseGPRSeqPair()
7761 (isWReg && !WRegClass.contains(SecondReg))) { in tryParseGPRSeqPair()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 1635 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect() local
1652 .addReg(FirstReg).addReg(SecondReg) in insertSelect()
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| D | PPCISelLowering.cpp | 6791 const unsigned SecondReg = State.AllocateReg(PPC::R10); in CC_AIX() local
6792 assert(FirstReg && SecondReg && in CC_AIX()
6797 CCValAssign::getCustomReg(ValNo, ValVT, SecondReg, RegVT, LocInfo)); in CC_AIX()
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