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Searched refs:SXIREAD4 (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/fdt/
Dsxiccmu.c667 reg = SXIREAD4(sc, 0); in sxiccmu_pll6_get_frequency()
698 reg = SXIREAD4(sc, 0); in sxiccmu_pll6_enable()
726 reg = SXIREAD4(sc, 0); in sxiccmu_apb1_get_frequency()
746 reg = SXIREAD4(sc, 0); in sxiccmu_cpus_get_frequency()
763 reg = SXIREAD4(sc, 0); in sxiccmu_apbs_get_frequency()
833 reg = SXIREAD4(sc, 0); in sxiccmu_mmc_do_set_frequency()
958 reg = SXIREAD4(sc, A10_PLL1_CFG_REG); in sxiccmu_a10_get_frequency()
970 reg = SXIREAD4(sc, A10_CPU_AHB_APB0_CFG_REG); in sxiccmu_a10_get_frequency()
986 reg = SXIREAD4(sc, A10_CPU_AHB_APB0_CFG_REG); in sxiccmu_a10_get_frequency()
991 reg = SXIREAD4(sc, A10_CPU_AHB_APB0_CFG_REG); in sxiccmu_a10_get_frequency()
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Dsunxireg.h29 #define SXIREAD4(sc, reg) \ macro
34 SXIWRITE4((sc), (reg), SXIREAD4((sc), (reg)) | (bits))
36 SXIWRITE4((sc), (reg), SXIREAD4((sc), (reg)) & ~(bits))
38 SXIWRITE4((sc), (reg), (SXIREAD4((sc), (reg)) & ~(mask)) | (bits))
Dsxipio.c432 reg = SXIREAD4(sc, SXIPIO_DAT(port)); in sxipio_get_pin()
452 reg = SXIREAD4(sc, SXIPIO_DAT(port)); in sxipio_set_pin()
560 reg = SXIREAD4(sc, SXIPIO_CFG(port, pin)); in sxipio_attach_gpio()
581 reg = SXIREAD4(sc, SXIPIO_DAT(port)); in sxipio_attach_gpio()
Dsxirtc.c218 reg = SXIREAD4(sc, sc->sc_yymmdd); in sxirtc_gettime()
227 reg = SXIREAD4(sc, sc->sc_hhmmss); in sxirtc_gettime()
/openbsd/src/sys/arch/armv7/sunxi/
Dsxie.c306 reg = SXIREAD4(sc, SXIE_MACA0); in sxie_socware_init()
311 reg = SXIREAD4(sc, SXIE_MACA1); in sxie_socware_init()
440 pending = SXIREAD4(sc, SXIE_INTSR); in sxie_intr()
586 fbc = SXIREAD4(sc, SXIE_RXFBC); in sxie_recv()
594 reg = SXIREAD4(sc, SXIE_RXIO); in sxie_recv()
599 while (SXIREAD4(sc, SXIE_RXCR) & SXIE_RXFLUSH); in sxie_recv()
605 reg = SXIREAD4(sc, SXIE_RXIO); in sxie_recv()
698 while (SXIREAD4(sc, SXIE_MACMIND) & 1 && --timo) in sxie_miibus_readreg()
708 return SXIREAD4(sc, SXIE_MACMRDD) & 0xffff; in sxie_miibus_readreg()
720 while (SXIREAD4(sc, SXIE_MACMIND) & 1 && --timo) in sxie_miibus_writereg()
Dsxiahci.c146 while ((SXIREAD4(sc, SXIAHCI_PHYCS0) >> 28 & 7) != 2 && --timo) in sxiahci_attach()
156 while ((SXIREAD4(sc, SXIAHCI_PHYCS2) & (1 << 24)) && --timo) in sxiahci_attach()