| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 751 SRL_PARTS, enumerator
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 122 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in LanaiTargetLowering()
192 case ISD::SRL_PARTS: in LowerOperation()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 113 setOperationAction(ISD::SRL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
114 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 324 case ISD::SRL_PARTS: return "srl_parts"; in getOperationName()
|
| D | SelectionDAG.cpp | 3373 case ISD::SRL_PARTS: { in computeKnownBits()
9388 case ISD::SRL_PARTS: in getNode()
|
| D | LegalizeDAG.cpp | 1262 case ISD::SRL_PARTS: in LegalizeOp()
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| D | LegalizeIntegerTypes.cpp | 4268 PartsOpc = ISD::SRL_PARTS; in ExpandIntRes_Shift()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 113 setOperationAction(ISD::SRL_PARTS, VT, Expand); in BPFTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 440 setOperationAction(ISD::SRL_PARTS, MVT::i32 , Custom); in NVPTXTargetLowering()
443 setOperationAction(ISD::SRL_PARTS, MVT::i64 , Custom); in NVPTXTargetLowering()
2084 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
2317 case ISD::SRL_PARTS: in LowerOperation()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 153 setOperationAction({ISD::SHL_PARTS, ISD::SRL_PARTS, ISD::SRA_PARTS}, MVT::i32, in R600TargetLowering()
405 case ISD::SRL_PARTS: return LowerShiftParts(Op, DAG); in LowerOperation()
|
| D | SIISelLowering.cpp | 249 setOperationAction({ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS}, MVT::i64, in SITargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 363 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in MipsTargetLowering()
369 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in MipsTargetLowering()
1236 case ISD::SRL_PARTS: return lowerShiftRightParts(Op, DAG, false); in LowerOperation()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1793 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1827 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in SparcTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 102 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 96 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand); in AVRTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 145 ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) { in WebAssemblyTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/ |
| D | VEISelLowering.cpp | 172 setOperationAction(ISD::SRL_PARTS, IntVT, Expand); in initSPUActions()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1582 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS, in HexagonTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1157 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in ARMTargetLowering()
1174 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in ARMTargetLowering()
6307 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
10452 case ISD::SRL_PARTS: in LowerOperation()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 735 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in PPCTargetLowering()
740 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in PPCTargetLowering()
11350 case ISD::SRL_PARTS: return LowerSRL_PARTS(Op, DAG); in LowerOperation()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 274 setOperationAction({ISD::SHL_PARTS, ISD::SRL_PARTS, ISD::SRA_PARTS}, XLenVT, in RISCVTargetLowering()
3754 case ISD::SRL_PARTS: in LowerOperation()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 292 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in SystemZTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 449 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in AArch64TargetLowering()
5932 case ISD::SRL_PARTS: in LowerOperation()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 498 setOperationAction(ISD::SRL_PARTS, VT, Custom); in X86TargetLowering()
33198 case ISD::SRL_PARTS: return LowerShiftParts(Op, DAG); in LowerOperation()
|