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Searched refs:SQ_WAVE_IB_DBG1__WAVE_IDLE_MASK (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h36463 #define SQ_WAVE_IB_DBG1__WAVE_IDLE_MASK … macro
Dgc_11_0_0_sh_mask.h41534 #define SQ_WAVE_IB_DBG1__WAVE_IDLE_MASK … macro
Dgc_12_0_0_sh_mask.h40290 #define SQ_WAVE_IB_DBG1__WAVE_IDLE_MASK … macro
Dgc_11_0_3_sh_mask.h44573 #define SQ_WAVE_IB_DBG1__WAVE_IDLE_MASK … macro
Dgc_10_1_0_sh_mask.h42881 #define SQ_WAVE_IB_DBG1__WAVE_IDLE_MASK … macro
Dgc_10_3_0_sh_mask.h48104 #define SQ_WAVE_IB_DBG1__WAVE_IDLE_MASK … macro