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Searched refs:SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT (Results 1 – 15 of 15) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h9217 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT 0x00000000 macro
Dgfx_7_2_sh_mask.h12010 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h13856 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h14254 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT 0x0 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h21805 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_9_4_3_sh_mask.h25274 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_9_1_sh_mask.h23112 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_9_2_1_sh_mask.h23079 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_9_4_2_sh_mask.h16894 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_11_5_0_sh_mask.h27860 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_11_0_0_sh_mask.h32011 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_12_0_0_sh_mask.h36022 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_11_0_3_sh_mask.h34509 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_10_1_0_sh_mask.h31702 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro
Dgc_10_3_0_sh_mask.h30046 #define SQ_PERFCOUNTER12_SELECT__PERF_SEL__SHIFT … macro