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Searched refs:SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK (Results 1 – 14 of 14) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h8839 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK 0x1f macro
Dgfx_8_0_sh_mask.h10457 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK 0x7f macro
Dgfx_8_1_sh_mask.h10855 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK 0x7f macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12300 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_9_4_3_sh_mask.h15825 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_9_1_sh_mask.h13680 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_9_2_1_sh_mask.h13476 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_9_4_2_sh_mask.h24910 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_11_5_0_sh_mask.h13882 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_11_0_0_sh_mask.h17188 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_12_0_0_sh_mask.h27211 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_11_0_3_sh_mask.h19431 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_10_1_0_sh_mask.h19681 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro
Dgc_10_3_0_sh_mask.h18042 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE_MASK … macro