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Searched refs:SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h10676 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT 0x8 macro
Dgfx_8_1_sh_mask.h11074 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT 0x8 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12681 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_9_4_3_sh_mask.h16207 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_9_1_sh_mask.h13981 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_9_2_1_sh_mask.h13846 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_9_4_2_sh_mask.h25271 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_11_5_0_sh_mask.h22359 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_11_0_0_sh_mask.h26347 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_12_0_0_sh_mask.h33485 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_11_0_3_sh_mask.h28847 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro
Dgc_10_1_0_sh_mask.h20051 #define SPI_RESOURCE_RESERVE_CU_15__LDS__SHIFT … macro