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Searched refs:SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK (Results 1 – 12 of 12) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h10679 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK 0x78000 macro
Dgfx_8_1_sh_mask.h11077 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK 0x78000 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12688 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_9_4_3_sh_mask.h16214 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_9_1_sh_mask.h13988 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_9_2_1_sh_mask.h13853 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_9_4_2_sh_mask.h25278 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_11_5_0_sh_mask.h22366 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_11_0_0_sh_mask.h26354 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_12_0_0_sh_mask.h33492 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_11_0_3_sh_mask.h28854 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro
Dgc_10_1_0_sh_mask.h20058 #define SPI_RESOURCE_RESERVE_CU_15__BARRIERS_MASK … macro