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Searched refs:SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h10164 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT 0x18 macro
Dgfx_8_1_sh_mask.h10562 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT 0x18 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h16175 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_9_4_3_sh_mask.h19654 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_9_1_sh_mask.h17480 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_9_2_1_sh_mask.h17355 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_9_4_2_sh_mask.h9604 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_11_5_0_sh_mask.h17316 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_11_0_0_sh_mask.h21347 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_12_0_0_sh_mask.h29708 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_11_0_3_sh_mask.h23677 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_10_1_0_sh_mask.h23676 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro
Dgc_10_3_0_sh_mask.h21839 #define SPI_PS_INPUT_CNTL_27__ATTR0_VALID__SHIFT macro