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Searched refs:SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT (Results 1 – 15 of 15) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h7669 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT 0x00000000 macro
Dgfx_7_2_sh_mask.h9208 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h10928 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h11326 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT 0x0 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h21632 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_9_4_3_sh_mask.h25101 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_9_1_sh_mask.h22939 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_9_2_1_sh_mask.h22906 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_9_4_2_sh_mask.h16721 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_11_5_0_sh_mask.h27679 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_11_0_0_sh_mask.h31830 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_12_0_0_sh_mask.h35841 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_11_0_3_sh_mask.h34328 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_10_1_0_sh_mask.h31577 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro
Dgc_10_3_0_sh_mask.h29945 #define SPI_PERFCOUNTER_BINS__BIN0_MIN__SHIFT … macro