Home
last modified time | relevance | path

Searched refs:SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h9206 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h10926 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h11324 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT 0x0 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h21629 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_9_4_3_sh_mask.h25098 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_9_1_sh_mask.h22936 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_9_2_1_sh_mask.h22903 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_9_4_2_sh_mask.h16718 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_11_5_0_sh_mask.h27676 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_11_0_0_sh_mask.h31827 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_12_0_0_sh_mask.h35776 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_11_0_3_sh_mask.h34325 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_10_1_0_sh_mask.h31574 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro
Dgc_10_3_0_sh_mask.h29942 #define SPI_PERFCOUNTER5_SELECT__PERF_SEL__SHIFT … macro