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Searched refs:SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT (Results 1 – 15 of 15) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h7619 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT 0x00000014 macro
Dgfx_7_2_sh_mask.h9168 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT 0x14 macro
Dgfx_8_0_sh_mask.h10888 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT 0x14 macro
Dgfx_8_1_sh_mask.h11286 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT 0x14 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h21548 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_9_4_3_sh_mask.h25017 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_9_1_sh_mask.h22855 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_9_2_1_sh_mask.h22822 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_9_4_2_sh_mask.h16637 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_11_5_0_sh_mask.h27595 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_11_0_0_sh_mask.h31746 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_12_0_0_sh_mask.h35723 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_11_0_3_sh_mask.h34244 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_10_1_0_sh_mask.h31493 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro
Dgc_10_3_0_sh_mask.h29861 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE__SHIFT … macro