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Searched refs:SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12362 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro
Dgc_9_4_3_sh_mask.h15882 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro
Dgc_9_2_1_sh_mask.h13538 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro
Dgc_9_4_2_sh_mask.h24963 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro
Dgc_11_5_0_sh_mask.h20926 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro
Dgc_11_0_0_sh_mask.h24888 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro
Dgc_12_0_0_sh_mask.h32680 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro
Dgc_11_0_3_sh_mask.h27354 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro
Dgc_10_1_0_sh_mask.h19743 #define SPI_GDBG_WAVE_CNTL3__STALL_CS2__SHIFT … macro