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Searched refs:SPI_ARB_CYCLES_0__TS1_DURATION_MASK (Results 1 – 15 of 15) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h7440 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK 0xffff0000L macro
Dgfx_7_2_sh_mask.h8787 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK 0xffff0000 macro
Dgfx_8_0_sh_mask.h10389 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK 0xffff0000 macro
Dgfx_8_1_sh_mask.h10787 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK 0xffff0000 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12228 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_9_4_3_sh_mask.h15753 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_9_1_sh_mask.h13654 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_9_2_1_sh_mask.h13404 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_9_4_2_sh_mask.h24884 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_11_5_0_sh_mask.h13860 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_11_0_0_sh_mask.h17166 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_12_0_0_sh_mask.h27189 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_11_0_3_sh_mask.h19409 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_10_1_0_sh_mask.h19655 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro
Dgc_10_3_0_sh_mask.h18020 #define SPI_ARB_CYCLES_0__TS1_DURATION_MASK … macro