| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVISelDAGToDAG.cpp | 665 unsigned ShOpc = SignExt ? RISCV::SLLIW : RISCV::SLLI; in tryShrinkShlLogicImm()
670 SDNode *SLLI = in tryShrinkShlLogicImm() local
673 ReplaceNode(Node, SLLI); in tryShrinkShlLogicImm()
736 SDNode *SLLI = CurDAG->getMachineNode( in Select() local
737 RISCV::SLLI, DL, VT, SDValue(SRLIW, 0), in Select()
739 ReplaceNode(Node, SLLI); in Select()
765 SDNode *SLLI = CurDAG->getMachineNode( in Select() local
766 RISCV::SLLI, DL, VT, SDValue(SRLIW, 0), in Select()
768 ReplaceNode(Node, SLLI); in Select()
808 SDNode *SLLI = in Select() local
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| D | RISCVStripWSuffix.cpp | 77 MI.getOpcode() == RISCV::ADDW ? RISCV::ADD : RISCV::SLLI; in runOnMachineFunction()
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| D | RISCVInstrInfoM.td | 115 (MULHU (SLLI GPR:$rs1, 32), (SLLI GPR:$rs2, 32))>;
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| D | RISCVSExtWRemoval.cpp | 276 case RISCV::SLLI: in isSignExtendedW()
311 case RISCV::SLLI: in getWOp()
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| D | RISCVRegisterInfo.cpp | 292 BuildMI(MBB, II, DL, TII->get(RISCV::SLLI), VL) in lowerVSPILL()
361 BuildMI(MBB, II, DL, TII->get(RISCV::SLLI), VL) in lowerVRELOAD()
740 case RISCV::SLLI: in getRegAllocationHints()
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| D | RISCVInstrInfo.td | 657 def SLLI : Shift_ri<0b00000, 0b001, "slli">;
1042 (SLLI GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt)>;
1240 def : PatGprUimmLog2XLen<shl, SLLI>;
1256 (SRAI (SLLI $rs, (ImmSubFromXLen (XLenVT 1))),
1261 (SLLI (SRLI $rs, LeadingOnesMask:$mask), LeadingOnesMask:$mask)>;
1263 (SRLI (SLLI $rs, TrailingOnesMask:$mask), TrailingOnesMask:$mask)>;
1713 def : Pat<(i64 (and GPR:$rs1, 0xffffffff)), (SRLI (SLLI GPR:$rs1, 32), 32)>;
1718 (SRLI (SLLI GPR:$rs1, 32), (ImmSubFrom32 uimm5:$shamt))>;
1747 (SLLI (SRLIW $rs, LeadingOnesWMask:$mask), LeadingOnesWMask:$mask)>;
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| D | RISCVAsmPrinter.cpp | 304 MCInstBuilder(RISCV::SLLI).addReg(RISCV::X6).addReg(Reg).addImm(8), in EmitHwasanMemaccessSymbols()
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| D | RISCVInstrInfo.cpp | 2468 BuildMI(MBB, II, DL, get(RISCV::SLLI), DestReg) in getVLENFactoredAmount()
2492 BuildMI(MBB, II, DL, get(RISCV::SLLI), DestReg) in getVLENFactoredAmount()
2503 BuildMI(MBB, II, DL, get(RISCV::SLLI), ScaledRegister) in getVLENFactoredAmount()
2514 BuildMI(MBB, II, DL, get(RISCV::SLLI), ScaledRegister) in getVLENFactoredAmount()
2633 case RISCV::SLLI: in hasAllNBitUsers()
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| D | RISCVInstrInfoZb.td | 721 (SLLI (SH1ADD GPR:$r, GPR:$r),
724 (SLLI (SH2ADD GPR:$r, GPR:$r),
727 (SLLI (SH3ADD GPR:$r, GPR:$r),
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| D | RISCVFrameLowering.cpp | 590 BuildMI(MBB, MBBI, DL, TII->get(RISCV::SLLI), SPReg) in emitPrologue()
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| D | RISCVInstrInfoC.td | 877 def : CompressPat<(SLLI GPRNoX0:$rs1, GPRNoX0:$rs1, uimmlog2xlennonzero:$imm),
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVMatInt.cpp | 24 case RISCV::SLLI: in getInstSeqCost()
148 unsigned Opc = Unsigned ? RISCV::SLLI_UW : RISCV::SLLI; in generateInstSeqImpl()
193 TmpSeq.emplace_back(RISCV::SLLI, TrailingZeros); in generateInstSeq()
402 case RISCV::SLLI: in getOpndKind()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsScheduleP5600.td | 441 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(SLL|SLLI)_[BHWD]$")>;
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| D | MipsScheduleGeneric.td | 1562 def : InstRW<[GenericWriteMSAShortLogic], (instregex "^(SLL|SLLI)_[BHWD]$")>;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/AsmParser/ |
| D | RISCVAsmParser.cpp | 2487 emitToStreamer(Out, MCInstBuilder(RISCV::SLLI) in emitPseudoExtend()
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