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Searched refs:SDMA0_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h2668 #define SDMA0_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro
Dgc_11_0_0_sh_mask.h5234 #define SDMA0_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro
Dgc_12_0_0_sh_mask.h2869 #define SDMA0_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro
Dgc_11_0_3_sh_mask.h6088 #define SDMA0_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro
Dgc_10_1_0_sh_mask.h862 #define SDMA0_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro
Dgc_10_3_0_sh_mask.h31804 #define SDMA0_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro