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Searched refs:SDMA0_BASE__INST0_SEG5 (Results 1 – 5 of 5) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/
Dvega20_ip_offset.h675 #define SDMA0_BASE__INST0_SEG5 0 macro
Dbeige_goby_ip_offset.h1032 #define SDMA0_BASE__INST0_SEG5 0 macro
Dyellow_carp_offset.h1125 #define SDMA0_BASE__INST0_SEG5 0 macro
Darct_ip_offset.h921 #define SDMA0_BASE__INST0_SEG5 0 macro
Daldebaran_ip_offset.h1204 #define SDMA0_BASE__INST0_SEG5 0 macro