Searched refs:RVV (Results 1 – 6 of 6) sorted by relevance
137 const RISCVVPseudosTable::PseudoInfo *RVV = in lowerRISCVVMachineInstrToMCInst() local139 if (!RVV) in lowerRISCVVMachineInstrToMCInst()142 OutMI.setOpcode(RVV->BaseInstr); in lowerRISCVVMachineInstrToMCInst()
71 const RISCVVPseudosTable::PseudoInfo *RVV = in getRVVMCOpcode() local73 if (!RVV) in getRVVMCOpcode()75 return RVV->BaseInstr; in getRVVMCOpcode()
1 //===- RISCVInstrInfoVSDPatterns.td - RVV SDNode patterns --*- tablegen -*-===//15 /// Note: the patterns for RVV intrinsics are found in
1 //===- RISCVInstrInfoVVLPatterns.td - RVV VL patterns ------*- tablegen -*-===//15 /// Note: the patterns for RVV intrinsics are found in
1069 - Note that the RISC-V Vector C intrinsics are still under development. The RVV1072 - Clang now supports `v0.11 RVV intrinsics <https://github.com/riscv-non-isa/rvv-intrinsic-doc/tree…
73 // will yield an RVV vector type (assume LMUL=1), so __rvv_int32m1_t.1531 // Define vread_csr&vwrite_csr described in RVV intrinsics doc.