Searched refs:RISCVInstrInfo (Results 1 – 17 of 17) sorted by relevance
| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.cpp | 56 RISCVInstrInfo::RISCVInstrInfo(RISCVSubtarget &STI) in RISCVInstrInfo() function in RISCVInstrInfo
60 MCInst RISCVInstrInfo::getNop() const { in getNop()
69 unsigned RISCVInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
96 unsigned RISCVInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
257 void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
463 void RISCVInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot()
547 void RISCVInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, in loadRegFromStackSlot()
629 MachineInstr *RISCVInstrInfo::foldMemoryOperandImpl( in foldMemoryOperandImpl()
687 void RISCVInstrInfo::movImm(MachineBasicBlock &MBB, in movImm()
766 const MCInstrDesc &RISCVInstrInfo::getBrCond(RISCVCC::CondCode CC) const { in getBrCond()
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| D | RISCV.td | 30 include "RISCVInstrInfo.td"
51 def RISCVInstrInfo : InstrInfo {
65 let InstructionSet = RISCVInstrInfo;
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| D | RISCVSubtarget.h | 60 RISCVInstrInfo InstrInfo;
86 const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
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| D | RISCVExpandPseudoInsts.cpp | 33 const RISCVInstrInfo *TII;
58 TII = static_cast<const RISCVInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
237 const RISCVInstrInfo *TII;
279 TII = static_cast<const RISCVInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| D | RISCVExpandAtomicPseudoInsts.cpp | 33 const RISCVInstrInfo *TII;
66 TII = static_cast<const RISCVInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
216 static void doAtomicBinOpExpansion(const RISCVInstrInfo *TII, MachineInstr &MI, in doAtomicBinOpExpansion()
256 static void insertMaskedMerge(const RISCVInstrInfo *TII, DebugLoc DL, in insertMaskedMerge()
279 const RISCVInstrInfo *TII, MachineInstr &MI, DebugLoc DL, in doMaskedAtomicBinOpExpansion()
379 static void insertSext(const RISCVInstrInfo *TII, DebugLoc DL, in insertSext()
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| D | RISCVStripWSuffix.cpp | 62 const RISCVInstrInfo &TII = *ST.getInstrInfo(); in runOnMachineFunction()
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| D | RISCVInstrInfo.h | 44 class RISCVInstrInfo : public RISCVGenInstrInfo {
47 explicit RISCVInstrInfo(RISCVSubtarget &STI);
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| D | RISCVSExtWRemoval.cpp | 98 const RISCVInstrInfo &TII, in isSignExtendedW()
326 const RISCVInstrInfo &TII = *ST.getInstrInfo(); in runOnMachineFunction()
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| D | RISCVFrameLowering.cpp | 65 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSCSPrologue()
115 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSCSEpilogue()
399 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitPrologue()
576 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitPrologue()
1037 const RISCVInstrInfo &TII) { in estimateFunctionSizeInBytes()
1078 const RISCVInstrInfo *TII = MF.getSubtarget<RISCVSubtarget>().getInstrInfo(); in processFunctionBeforeFrameFinalized()
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| D | CMakeLists.txt | 30 RISCVInstrInfo.cpp
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| D | RISCVMakeCompressible.cpp | 332 const RISCVInstrInfo &TII = *STI.getInstrInfo(); in runOnMachineFunction()
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| D | RISCVRegisterInfo.cpp | 177 const RISCVInstrInfo *TII = ST.getInstrInfo(); in adjustReg()
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| D | RISCVISelDAGToDAG.cpp | 2688 const RISCVInstrInfo &TII = *Subtarget->getInstrInfo(); in doPeepholeMaskedRVV()
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| D | RISCVInstrInfo.td | 1 //===-- RISCVInstrInfo.td - Target Description for RISCV ---*- tablegen -*-===//
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| D | RISCVISelLowering.cpp | 11250 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in EmitLoweredCascadedSelect()
11389 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in emitSelectPseudo()
11591 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in emitFROUND()
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| /openbsd/src/gnu/usr.bin/clang/libLLVMRISCVCodeGen/ |
| D | Makefile | 23 RISCVInstrInfo.cpp \
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| /openbsd/src/gnu/llvm/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/ |
| D | BUILD.gn | 79 "RISCVInstrInfo.cpp",
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