| /openbsd/src/sys/dev/pci/drm/amd/display/dmub/src/ |
| D | dmub_reg.h | 43 #define REG(reg) (REGS)->offset.reg
45 #define FD(reg_field) (REGS)->shift.reg_field, (REGS)->mask.reg_field
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| D | dmub_dcn21.c | 36 #define REGS dmub->regs macro
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| D | dmub_dcn301.c | 36 #define REGS dmub->regs macro
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| D | dmub_dcn303.c | 37 #define REGS dmub->regs macro
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| D | dmub_dcn302.c | 36 #define REGS dmub->regs macro
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| D | dmub_dcn315.c | 42 #define REGS dmub->regs_dcn31 macro
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| D | dmub_dcn316.c | 42 #define REGS dmub->regs_dcn31 macro
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| D | dmub_dcn314.c | 42 #define REGS dmub->regs_dcn31 macro
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| D | dmub_dcn351.c | 13 #define REGS dmub->regs_dcn35 macro
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| D | dmub_dcn30.c | 37 #define REGS dmub->regs macro
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| D | dmub_dcn20.c | 37 #define REGS dmub->regs macro
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| D | dmub_dcn31.c | 36 #define REGS dmub->regs_dcn31 macro
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| D | dmub_dcn32.c | 37 #define REGS dmub->regs_dcn32 macro
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| D | dmub_dcn35.c | 37 #define REGS dmub->regs_dcn35 macro
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| D | dmub_dcn401.c | 16 #define REGS dmub->regs_dcn401 macro
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| /openbsd/src/gnu/usr.bin/binutils-2.17/opcodes/ |
| D | m10300-opc.c | 213 #define REGS (REGS_SHIFT8+1) macro
217 #define USP (REGS+1)
754 { "movm", 0xce00, 0xff00, 0, FMT_S1, 0, {MEM(SP), REGS}},
755 { "movm", 0xcf00, 0xff00, 0, FMT_S1, 0, {REGS, MEM(SP)}},
756 { "movm", 0xf8ce00, 0xffff00, 0, FMT_D1, AM33, {MEM(USP), REGS}},
757 { "movm", 0xf8cf00, 0xffff00, 0, FMT_D1, AM33, {REGS, MEM(USP)}},
1008 { "call", 0xcd000000, 0xff000000, 0, FMT_S4, 0, {D16_SHIFT,REGS,IMM8E}},
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| D | ChangeLog-9297 | 1298 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
1300 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
1433 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
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| /openbsd/src/gnu/usr.bin/binutils/opcodes/ |
| D | m10300-opc.c | 212 #define REGS (REGS_SHIFT8+1) macro
216 #define USP (REGS+1)
753 { "movm", 0xce00, 0xff00, 0, FMT_S1, 0, {MEM(SP), REGS}},
754 { "movm", 0xcf00, 0xff00, 0, FMT_S1, 0, {REGS, MEM(SP)}},
755 { "movm", 0xf8ce00, 0xffff00, 0, FMT_D1, AM33, {MEM(USP), REGS}},
756 { "movm", 0xf8cf00, 0xffff00, 0, FMT_D1, AM33, {REGS, MEM(USP)}},
1007 { "call", 0xcd000000, 0xff000000, 0, FMT_S4, 0, {D16_SHIFT,REGS,IMM8E}},
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| D | ChangeLog-9297 | 1298 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
1300 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
1433 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
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| /openbsd/src/gnu/usr.bin/gcc/gcc/config/i370/ |
| D | i370.h | 762 #define COUNT_REGS(X, REGS, FAIL) \ argument
764 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
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| /openbsd/src/sys/dev/pci/drm/amd/amdgpu/ |
| D | amdgpu_uvd_v4_2.c | 640 WREG32_FIELD(UVD_CGC_GATE, REGS, 0); in uvd_v4_2_set_dcm()
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| D | amdgpu_uvd_v3_1.c | 211 WREG32_FIELD(UVD_CGC_GATE, REGS, 0); in uvd_v3_1_set_dcm()
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| /openbsd/src/gnu/gcc/gcc/doc/ |
| D | gccint.info | 23086 -- Target Hook: void TARGET_EXTRA_LIVE_ON_ENTRY (bitmap *REGS)
23087 Add any hard registers to REGS that are live on entry to the
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| /openbsd/src/gnu/usr.bin/perl/lib/unicore/ |
| D | NormTest.txt | 5505 B80B;B80B;1105 1166 11AA;B80B;1105 1166 11AA; # (렋; 렋; 렋; 렋; 렋; ) HANGUL SYLLABLE REGS
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