Searched refs:RADEON_SCLK_MORE_CNTL (Results 1 – 2 of 2) sorted by relevance
605 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()608 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()658 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()661 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()776 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()787 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()848 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()850 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()892 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); in radeon_legacy_set_clock_gating()894 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); in radeon_legacy_set_clock_gating()[all …]
1698 #define RADEON_SCLK_MORE_CNTL 0x0035 /* PLL */ macro