Searched refs:R600InstrInfo (Results 1 – 20 of 20) sorted by relevance
| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.cpp | 33 R600InstrInfo::R600InstrInfo(const R600Subtarget &ST) in R600InstrInfo() function in R600InstrInfo
36 bool R600InstrInfo::isVector(const MachineInstr &MI) const { in isVector()
40 void R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
75 bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, in isLegalToSplitMBBAt()
86 bool R600InstrInfo::isMov(unsigned Opcode) const { in isMov()
97 bool R600InstrInfo::isReductionOp(unsigned Opcode) const { in isReductionOp()
101 bool R600InstrInfo::isCubeOp(unsigned Opcode) const { in isCubeOp()
112 bool R600InstrInfo::isALUInstr(unsigned Opcode) const { in isALUInstr()
118 bool R600InstrInfo::hasInstrModifiers(unsigned Opcode) const { in hasInstrModifiers()
126 bool R600InstrInfo::isLDSInstr(unsigned Opcode) const { in isLDSInstr()
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| D | R600InstrInfo.h | 38 class R600InstrInfo final : public R600GenInstrInfo {
68 explicit R600InstrInfo(const R600Subtarget &);
123 const std::vector<R600InstrInfo::BankSwizzle> &Swz,
125 R600InstrInfo::BankSwizzle TransSwz) const;
129 std::vector<R600InstrInfo::BankSwizzle> &SwzCandidate,
131 R600InstrInfo::BankSwizzle TransSwz) const;
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| D | R600.td | 11 def R600InstrInfo : InstrInfo {
16 let InstructionSet = R600InstrInfo;
36 include "R600InstrInfo.td"
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| D | R600MachineScheduler.h | 24 class R600InstrInfo; variable
29 const R600InstrInfo *TII = nullptr;
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| D | R600Subtarget.h | 32 R600InstrInfo InstrInfo;
50 const R600InstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
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| D | R600Packetizer.cpp | 52 const R600InstrInfo *TII;
223 std::vector<R600InstrInfo::BankSwizzle> &BS, in isBundlableWithCurrentPMI()
291 std::vector<R600InstrInfo::BankSwizzle> BS; in addToPacket()
322 const R600InstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
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| D | R600InstrInfo.td | 1 //===-- R600InstrInfo.td - R600 DAG nodes ------------------*- tablegen -*-===//
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| D | R600RegisterInfo.cpp | 40 const R600InstrInfo *TII = ST.getInstrInfo(); in getReservedRegs()
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| D | R600ClauseMergePass.cpp | 39 const R600InstrInfo *TII;
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| D | R600ExpandSpecialInstrs.cpp | 31 const R600InstrInfo *TII = nullptr;
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| D | CMakeLists.txt | 121 R600InstrInfo.cpp
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| D | R600EmitClauseMarkers.cpp | 34 const R600InstrInfo *TII = nullptr;
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| D | R600Instructions.td | 99 // R600Defines.h, R600InstrInfo::buildDefaultInstruction(),
100 // and R600InstrInfo::getOperandIdx().
141 // R600InstrInfo::buildDefaultInstruction(), and R600InstrInfo::getOperandIdx().
181 // R600InstrInfo::buildDefaultInstruction(), and
182 // R600InstrInfo::getOperandIdx().
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| D | R600MachineScheduler.cpp | 26 TII = static_cast<const R600InstrInfo*>(DAG->TII); in initialize()
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| D | R600OptimizeVectorRegisters.cpp | 79 const R600InstrInfo *TII = nullptr;
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| D | R600ControlFlowFinalizer.cpp | 205 const R600InstrInfo *TII = nullptr;
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| D | R600ISelLowering.cpp | 217 const R600InstrInfo *TII = Subtarget->getInstrInfo(); in EmitInstrWithCustomInserter()
1955 const R600InstrInfo *TII = Subtarget->getInstrInfo(); in FoldOperand()
2084 const R600InstrInfo *TII = Subtarget->getInstrInfo(); in PostISelFolding()
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| D | R600MachineCFGStructurizer.cpp | 157 const R600InstrInfo *TII = nullptr;
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| /openbsd/src/gnu/usr.bin/clang/libLLVMAMDGPUCodeGen/ |
| D | Makefile | 86 R600InstrInfo.cpp \
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| /openbsd/src/gnu/llvm/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/ |
| D | BUILD.gn | 203 "R600InstrInfo.cpp",
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