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Searched refs:OutMI (Results 1 – 25 of 38) sorted by relevance

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/openbsd/src/gnu/llvm/llvm/lib/Target/Mips/
DMipsMCInstLower.cpp215 lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const { in lowerLongBranchLUi()
216 OutMI.setOpcode(Mips::LUi); in lowerLongBranchLUi()
219 OutMI.addOperand(LowerOperand(MI->getOperand(0))); in lowerLongBranchLUi()
244 OutMI.addOperand(MCOperand::createExpr(MipsExpr)); in lowerLongBranchLUi()
247 OutMI.addOperand(createSub(MI->getOperand(1).getMBB(), in lowerLongBranchLUi()
253 MCInst &OutMI, int Opcode) const { in lowerLongBranchADDiu() argument
254 OutMI.setOpcode(Opcode); in lowerLongBranchADDiu()
278 OutMI.addOperand(LowerOperand(MO)); in lowerLongBranchADDiu()
286 OutMI.addOperand(MCOperand::createExpr(MipsExpr)); in lowerLongBranchADDiu()
289 OutMI.addOperand(createSub(MI->getOperand(2).getMBB(), in lowerLongBranchADDiu()
[all …]
DMipsMCInstLower.h37 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
45 void lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const;
46 void lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI,
48 bool lowerLongBranch(const MachineInstr *MI, MCInst &OutMI) const;
/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/
DRISCVMCInstLower.cpp136 MCInst &OutMI) { in lowerRISCVVMachineInstrToMCInst() argument
142 OutMI.setOpcode(RVV->BaseInstr); in lowerRISCVVMachineInstrToMCInst()
205 OutMI.addOperand(MCOp); in lowerRISCVVMachineInstrToMCInst()
211 OutMI.addOperand(MCOperand::createReg(RISCV::NoRegister)); in lowerRISCVVMachineInstrToMCInst()
216 bool llvm::lowerRISCVMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in lowerRISCVMachineInstrToMCInst() argument
218 if (lowerRISCVVMachineInstrToMCInst(MI, OutMI)) in lowerRISCVMachineInstrToMCInst()
221 OutMI.setOpcode(MI->getOpcode()); in lowerRISCVMachineInstrToMCInst()
226 OutMI.addOperand(MCOp); in lowerRISCVMachineInstrToMCInst()
229 switch (OutMI.getOpcode()) { in lowerRISCVMachineInstrToMCInst()
244 OutMI.setOpcode(RISCV::CSRRS); in lowerRISCVMachineInstrToMCInst()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/
DWebAssemblyMCInstLower.cpp43 static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI);
168 MCInst &OutMI) const { in lower()
169 OutMI.setOpcode(MI->getOpcode()); in lower()
264 OutMI.addOperand(MCOp); in lower()
268 removeRegisterOperands(MI, OutMI); in lower()
270 OutMI.insert(OutMI.begin(), MCOperand::createImm(MI->getNumExplicitDefs())); in lower()
273 static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) { in removeRegisterOperands() argument
291 auto RegOpcode = OutMI.getOpcode(); in removeRegisterOperands()
294 OutMI.setOpcode(StackOpcode); in removeRegisterOperands()
297 for (auto I = OutMI.getNumOperands(); I; --I) { in removeRegisterOperands()
[all …]
DWebAssemblyMCInstLower.h43 void lower(const MachineInstr *MI, MCInst &OutMI) const;
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86MCInstLower.cpp69 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
498 void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
499 OutMI.setOpcode(MI->getOpcode()); in Lower()
503 OutMI.addOperand(*MaybeMCOp); in Lower()
506 switch (OutMI.getOpcode()) { in Lower()
512 assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands && in Lower()
514 assert(OutMI.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in Lower()
524 switch (OutMI.getOpcode()) { in Lower()
531 OutMI.setOpcode(NewOpc); in Lower()
533 unsigned DestReg = OutMI.getOperand(0).getReg(); in Lower()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DR600MCInstLower.cpp30 void lower(const MachineInstr *MI, MCInst &OutMI) const;
38 void R600MCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
39 OutMI.setOpcode(MI->getOpcode()); in lower()
43 OutMI.addOperand(MCOp); in lower()
DAMDGPUMCInstLower.cpp117 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
129 OutMI.setOpcode(TII->pseudoToMCOpcode(AMDGPU::S_SWAPPC_B64)); in lower()
133 OutMI.addOperand(Dest); in lower()
134 OutMI.addOperand(Src); in lower()
148 OutMI.setOpcode(MCOpcode); in lower()
153 OutMI.addOperand(MCOp); in lower()
157 if (FIIdx >= (int)OutMI.getNumOperands()) in lower()
158 OutMI.addOperand(MCOperand::createImm(0)); in lower()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64MCInstLower.cpp326 void AArch64MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
327 OutMI.setOpcode(MI->getOpcode()); in Lower()
332 OutMI.addOperand(MCOp); in Lower()
335 switch (OutMI.getOpcode()) { in Lower()
337 OutMI = MCInst(); in Lower()
338 OutMI.setOpcode(AArch64::RET); in Lower()
339 OutMI.addOperand(MCOperand::createReg(AArch64::LR)); in Lower()
342 OutMI = MCInst(); in Lower()
343 OutMI.setOpcode(AArch64::RET); in Lower()
344 OutMI.addOperand(MCOperand::createReg(AArch64::LR)); in Lower()
/openbsd/src/gnu/llvm/llvm/lib/Target/BPF/
DBPFMCInstLower.cpp47 void BPFMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
48 OutMI.setOpcode(MI->getOpcode()); in Lower()
79 OutMI.addOperand(MCOp); in Lower()
DBPFMCInstLower.h32 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
/openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/
DSparcMCInstLower.cpp94 MCInst &OutMI, in LowerSparcMachineInstrToMCInst() argument
98 OutMI.setOpcode(MI->getOpcode()); in LowerSparcMachineInstrToMCInst()
104 OutMI.addOperand(MCOp); in LowerSparcMachineInstrToMCInst()
/openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/
DSystemZMCInstLower.cpp94 void SystemZMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
95 OutMI.setOpcode(MI->getOpcode()); in lower()
99 OutMI.addOperand(lowerOperand(MO)); in lower()
DSystemZMCInstLower.h31 void lower(const MachineInstr *MI, MCInst &OutMI) const;
/openbsd/src/gnu/llvm/llvm/lib/Target/VE/
DVEMCInstLower.cpp77 void llvm::LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerVEMachineInstrToMCInst() argument
79 OutMI.setOpcode(MI->getOpcode()); in LowerVEMachineInstrToMCInst()
85 OutMI.addOperand(MCOp); in LowerVEMachineInstrToMCInst()
/openbsd/src/gnu/llvm/llvm/lib/Target/XCore/
DXCoreMCInstLower.cpp103 void XCoreMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
104 OutMI.setOpcode(MI->getOpcode()); in Lower()
110 OutMI.addOperand(MCOp); in Lower()
DXCoreMCInstLower.h30 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
/openbsd/src/gnu/llvm/llvm/lib/Target/ARC/
DARCMCInstLower.cpp104 void ARCMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
105 OutMI.setOpcode(MI->getOpcode()); in Lower()
111 OutMI.addOperand(MCOp); in Lower()
DARCMCInstLower.h33 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
/openbsd/src/gnu/llvm/llvm/lib/Target/AVR/
DAVRMCInstLower.cpp69 MCInst &OutMI) const { in lowerInstruction()
71 OutMI.setOpcode(MI.getOpcode()); in lowerInstruction()
117 OutMI.addOperand(MCOp); in lowerInstruction()
DAVRMCInstLower.h32 void lowerInstruction(const MachineInstr &MI, MCInst &OutMI) const;
/openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/
DMSP430MCInstLower.cpp115 void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
116 OutMI.setOpcode(MI->getOpcode()); in Lower()
155 OutMI.addOperand(MCOp); in Lower()
/openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/
DLanaiMCInstLower.cpp93 void LanaiMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
94 OutMI.setOpcode(MI->getOpcode()); in Lower()
134 OutMI.addOperand(MCOp); in Lower()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMMCInstLower.cpp123 void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerARMMachineInstrToMCInst() argument
125 OutMI.setOpcode(MI->getOpcode()); in LowerARMMachineInstrToMCInst()
163 OutMI.addOperand(MCOp); in LowerARMMachineInstrToMCInst()
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCMCInstLower.cpp151 void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerPPCMachineInstrToMCInst() argument
153 OutMI.setOpcode(MI->getOpcode()); in LowerPPCMachineInstrToMCInst()
158 OutMI.addOperand(MCOp); in LowerPPCMachineInstrToMCInst()

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