| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 89 MachineInstr *Mov = TII->buildMovInstr(&MBB, I, in runOnMachineFunction() local
94 int MovPredSelIdx = TII->getOperandIdx(Mov->getOpcode(), in runOnMachineFunction()
97 Mov->getOperand(MovPredSelIdx).setReg( in runOnMachineFunction()
|
| D | SIPreEmitPeephole.cpp | 94 const unsigned Mov = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in optimizeVccBranch() local
178 BuildMI(*A->getParent(), *A, A->getDebugLoc(), TII->get(Mov), CondReg) in optimizeVccBranch()
181 BuildMI(*A->getParent(), *A, A->getDebugLoc(), TII->get(Mov), CondReg) in optimizeVccBranch()
|
| D | R600InstrInfo.cpp | 1111 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, in buildIndirectWrite() local
1115 setImmOperand(*Mov, R600::OpName::dst_rel, 1); in buildIndirectWrite()
1116 return Mov; in buildIndirectWrite()
1143 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, in buildIndirectRead() local
1148 setImmOperand(*Mov, R600::OpName::src0_rel, 1); in buildIndirectRead()
1150 return Mov; in buildIndirectRead()
|
| D | SILoadStoreOptimizer.cpp | 1910 MachineInstr *Mov = in createRegOrImm() local
1914 (void)Mov; in createRegOrImm()
1915 LLVM_DEBUG(dbgs() << " "; Mov->dump()); in createRegOrImm()
|
| D | AMDGPUISelDAGToDAG.cpp | 810 SDNode *Mov = CurDAG->getMachineNode( in getMaterializedScalarImm32() local
813 return SDValue(Mov, 0); in getMaterializedScalarImm32()
|
| D | AMDGPUInstructionSelector.cpp | 1437 unsigned Mov = DstRB->getID() == AMDGPU::SGPRRegBankID ? in selectGroupStaticSize() local
1443 auto MIB = BuildMI(*MBB, &I, DL, TII.get(Mov), DstReg); in selectGroupStaticSize()
|
| D | SIISelLowering.cpp | 5567 SDNode *Mov = DAG.getMachineNode(AMDGPU::S_MOV_B64, DL, MVT::i64, in getSegmentAperture() local
5572 {SDValue(Mov, 0), DAG.getConstant(32, DL, MVT::i64)})); in getSegmentAperture()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1019 MachineInstrBuilder Mov; in copyPhysReg() local
1037 Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst).addReg(Src); in copyPhysReg()
1040 Mov.addReg(Src); in copyPhysReg()
1044 addUnpredicatedMveVpredROp(Mov, Dst); in copyPhysReg()
1046 Mov = Mov.add(predOps(ARMCC::AL)); in copyPhysReg()
1049 Mov = Mov.add(condCodeOp()); in copyPhysReg()
1052 Mov->addRegisterDefined(DestReg, TRI); in copyPhysReg()
1054 Mov->addRegisterKilled(SrcReg, TRI); in copyPhysReg()
|
| D | ARMScheduleA9.td | 2153 // A9WriteLfp1-8Mov adds a cycle of latency and FP resource for
2155 def A9WriteLfp#NumAddr#Mov : WriteSequence<
|
| D | ARMInstrThumb2.td | 5525 // ARMLowOverheadLoops if possible, or reverted to a Mov if not.
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64InstructionSelector.cpp | 5431 auto Mov = in emitConstantVector() local
5433 constrainSelectedInstRegOperands(*Mov, TII, TRI, RBI); in emitConstantVector()
5434 return &*Mov; in emitConstantVector()
5438 auto Mov = in emitConstantVector() local
5443 .addReg(Mov.getReg(0), 0, AArch64::dsub); in emitConstantVector()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 11750 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm64() local
11752 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in tryAdvSIMDModImm64()
11793 SDValue Mov; in tryAdvSIMDModImm32() local
11796 Mov = DAG.getNode(NewOp, dl, MovTy, *LHS, in tryAdvSIMDModImm32()
11800 Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm32()
11804 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in tryAdvSIMDModImm32()
11837 SDValue Mov; in tryAdvSIMDModImm16() local
11840 Mov = DAG.getNode(NewOp, dl, MovTy, *LHS, in tryAdvSIMDModImm16()
11844 Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm16()
11848 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in tryAdvSIMDModImm16()
[all …]
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 8152 SDValue Mov = DAG.getNode(PPCISD::MFVSR, dl, Op.getValueType(), Conv); in LowerFP_TO_INTDirectMove() local
8154 return DAG.getMergeValues({Mov, Conv.getValue(1)}, dl); in LowerFP_TO_INTDirectMove()
8156 return Mov; in LowerFP_TO_INTDirectMove()
8418 SDValue Mov = DAG.getNode(MovOpc, dl, MVT::f64, Src); in LowerINT_TO_FPDirectMove() local
8419 return convertIntToFP(Op, Mov, DAG, Subtarget); in LowerINT_TO_FPDirectMove()
|