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Searched refs:MVC (Results 1 – 19 of 19) sorted by relevance

/openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/
DSystemZSelectionDAGInfo.cpp68 return emitMemMemImm(DAG, DL, SystemZISD::MVC, Chain, Dst, Src, in EmitTargetCodeForMemcpy()
71 return emitMemMemReg(DAG, DL, SystemZISD::MVC, Chain, Dst, Src, Size); in EmitTargetCodeForMemcpy()
DREADME.txt39 We only use MVC, XC and CLC for constant-length block operations.
DSystemZPatterns.td114 // Try to use MVC instruction INSN for a load of type LOAD followed by a store
DSystemZInstrInfo.cpp340 if (MI.getOpcode() != SystemZ::MVC || !MI.getOperand(0).isFI() || in isStackSlotCopy()
1171 get(SystemZ::MVC)) in foldMemoryOperandImpl()
1182 get(SystemZ::MVC)) in foldMemoryOperandImpl()
DSystemZISelLowering.h119 MVC, enumerator
DSystemZOperators.td407 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
593 // A store of a load that can be implemented using MVC.
DSystemZScheduleZ196.td166 def : InstRW<[WLat1, FXU, LSU3, GroupAlone], (instregex "MVC$")>;
1150 def : InstRW<[WLat30, MCD], (instregex "MVC(K|P|S)$")>;
1151 def : InstRW<[WLat30, MCD], (instregex "MVC(S|D)K$")>;
DSystemZScheduleZEC12.td171 def : InstRW<[WLat1, FXU, LSU3, GroupAlone], (instregex "MVC$")>;
1195 def : InstRW<[WLat30, MCD], (instregex "MVC(K|P|S)$")>;
1196 def : InstRW<[WLat30, MCD], (instregex "MVC(S|D)K$")>;
DSystemZScheduleZ13.td187 def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
1471 def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;
1472 def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;
DSystemZScheduleZ16.td188 def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
1639 def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;
1640 def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;
DSystemZScheduleZ15.td188 def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
1607 def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;
1608 def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;
DSystemZScheduleZ14.td188 def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
1561 def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;
1562 def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;
DSystemZISelLowering.cpp899 bool MVC = Ty->isIntegerTy(8); in getLoadStoreAddrMode() local
900 return AddressingMode(!MVC/*LongDispl*/, !MVC/*IdxReg*/); in getLoadStoreAddrMode()
5941 OPCODE(MVC); in getTargetNodeName()
8420 if (Opcode == SystemZ::MVC) in emitMemMemWrapper()
8491 if (Opcode != SystemZ::MVC) { in emitMemMemWrapper()
8989 return emitMemMemWrapper(MI, MBB, SystemZ::MVC); in EmitInstrWithCustomInserter()
9004 return emitMemMemWrapper(MI, MBB, SystemZ::MVC, true/*IsMemset*/); in EmitInstrWithCustomInserter()
DSystemZInstrInfo.td526 defm MVC : MemorySS<"mvc", 0xD2, z_mvc>;
/openbsd/src/gnu/usr.bin/gcc/gcc/config/i370/
Di370.md51 ;; MVC 152(4,r13),0(r5,r13) might be generated if both op0 and op1 are
654 return \"MVC %O0(8,%R0),%W1\";
740 return \"MVC %O0(8,%R0),%1\";
797 return \"MVC %O0(4,%R0),%1\";
921 return \"MVC %O0(2,%R0),%H1\";
924 return \"MVC %O0(2,%R0),%1\";
1018 return \"MVC %O0(1,%R0),%1\";
1191 return \"MVC %O0(8,%R0),%1\";
1316 return \"MVC %O0(4,%R0),%1\";
1486 return \"MVC %O0(%c2,%R0),%1\";
[all …]
DREADME74 98.12.05 -- fix numerous MVC bugs
/openbsd/src/gnu/gcc/gcc/config/s390/
Ds390.md1717 ; Block move (MVC) patterns.
/openbsd/src/gnu/llvm/clang/docs/
DInternalsManual.rst192 without requiring it to use a specific presentation (consider this MVC for
/openbsd/src/gnu/usr.bin/gcc/gcc/
DChangeLog.36433 (movdi): Put back STM and MVC in definition.