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Searched refs:LiveIns (Results 1 – 24 of 24) sorted by relevance

/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DMachineRegisterInfo.cpp213 for (auto &I : LiveIns) in clearVirtRegs()
472 for (unsigned i = 0, e = LiveIns.size(); i != e; ++i) in EmitLiveInCopies()
473 if (LiveIns[i].second) { in EmitLiveInCopies()
474 if (use_nodbg_empty(LiveIns[i].second)) { in EmitLiveInCopies()
480 LiveIns.erase(LiveIns.begin() + i); in EmitLiveInCopies()
485 TII.get(TargetOpcode::COPY), LiveIns[i].second) in EmitLiveInCopies()
486 .addReg(LiveIns[i].first); in EmitLiveInCopies()
489 EntryMBB->addLiveIn(LiveIns[i].first); in EmitLiveInCopies()
493 EntryMBB->addLiveIn(LiveIns[i].first); in EmitLiveInCopies()
DMachineBasicBlock.cpp585 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in removeLiveIn()
586 if (I == LiveIns.end()) in removeLiveIn()
591 LiveIns.erase(I); in removeLiveIn()
597 LiveInVector::iterator LI = LiveIns.begin() + (I - LiveIns.begin()); in removeLiveIn()
598 return LiveIns.erase(LI); in removeLiveIn()
603 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in isLiveIn()
608 llvm::sort(LiveIns, in sortUniqueLiveIns()
613 LiveInVector::const_iterator I = LiveIns.begin(); in sortUniqueLiveIns()
615 LiveInVector::iterator Out = LiveIns.begin(); in sortUniqueLiveIns()
616 for (; I != LiveIns.end(); ++Out, I = J) { in sortUniqueLiveIns()
[all …]
DMachineTraceMetrics.cpp766 for (const LiveInReg &LIR : TBI.LiveIns) { in computeCrossBlockCriticalPath()
991 TBI.LiveIns.push_back(Reg); in addLiveIns()
1009 TBI.LiveIns.clear(); in computeInstrHeights()
1027 for (LiveInReg &LI : TBI.LiveIns) { in computeInstrHeights()
1133 for (LiveInReg &LIR : TBI.LiveIns) { in computeInstrHeights()
1142 TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle)); in computeInstrHeights()
DMachineOutliner.cpp694 LivePhysRegs LiveIns(TRI); in createOutlinedFunction() local
707 LiveIns.addReg(Reg); in createOutlinedFunction()
709 addLiveIns(MBB, LiveIns); in createOutlinedFunction()
DRDFGraph.cpp649 LiveIns(PRI) { in DataFlowGraph()
656 LiveIns(PRI) { in DataFlowGraph()
901 LiveIns.insert(RegisterRef(P.first)); in build()
904 LiveIns.insert(RegisterRef(I.PhysReg, I.LaneMask)); in build()
909 for (auto I = LiveIns.rr_begin(), E = LiveIns.rr_end(); I != E; ++I) { in build()
DRDFLiveness.cpp898 const RegisterAggr &LiveIns = LiveMap[&B]; in resetLiveIns() local
899 for (const RegisterRef R : make_range(LiveIns.rr_begin(), LiveIns.rr_end())) in resetLiveIns()
DPrologEpilogInserter.cpp1278 BitVector LiveIns(TRI.getNumRegs()); in insertZeroCallUsedRegs() local
1280 LiveIns.set(LI.PhysReg); in insertZeroCallUsedRegs()
1299 if (!LiveIns[Reg]) in insertZeroCallUsedRegs()
DMIRPrinter.cpp328 MF.LiveIns.push_back(LiveIn); in convert()
/openbsd/src/gnu/llvm/llvm/tools/llvm-exegesis/lib/
DBenchmarkCode.h26 std::vector<unsigned> LiveIns; member
DAssembler.cpp177 ArrayRef<unsigned> LiveIns, in assembleToStream() argument
195 for (const unsigned Reg : LiveIns) in assembleToStream()
204 for (const unsigned Reg : LiveIns) in assembleToStream()
DAssembler.h92 ArrayRef<unsigned> LiveIns,
DSnippetFile.cpp77 Result->LiveIns.push_back(Reg); in HandleComment()
DBenchmarkRunner.cpp144 State.getExegesisTarget(), State.createTargetMachine(), BC.LiveIns, in assembleSnippet()
DSnippetGenerator.cpp85 BC.LiveIns.push_back(CT.ScratchSpacePointerInReg); in generateConfigurations()
/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/
DMachineRegisterInfo.h149 std::vector<std::pair<MCRegister, Register>> LiveIns; variable
986 LiveIns.push_back(std::make_pair(Reg, vreg));
993 livein_iterator livein_begin() const { return LiveIns.begin(); } in livein_begin()
994 livein_iterator livein_end() const { return LiveIns.end(); } in livein_end()
995 bool livein_empty() const { return LiveIns.empty(); } in livein_empty()
998 return LiveIns; in liveins()
DMachineBasicBlock.h133 LiveInVector LiveIns;
410 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
413 LiveIns.push_back(RegMaskPair);
445 livein_iterator livein_begin_dbg() const { return LiveIns.begin(); }
451 livein_iterator livein_end() const { return LiveIns.end(); }
452 bool livein_empty() const { return LiveIns.empty(); }
DMachineTraceMetrics.h233 SmallVector<LiveInReg, 4> LiveIns; member
DMIRYamlMapping.h712 std::vector<MachineFunctionLiveIn> LiveIns;
752 YamlIO.mapOptional("liveins", MF.LiveIns,
DRDFGraph.h671 const RegisterAggr &getLiveIns() const { return LiveIns; } in getLiveIns()
879 RegisterAggr LiveIns; member
/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonBlockRanges.cpp235 RegisterSet LiveIns; in getLiveIns() local
253 LiveIns.insert(R); in getLiveIns()
256 LiveIns.insert(S); in getLiveIns()
258 return LiveIns; in getLiveIns()
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DGCNSchedStrategy.cpp503 RPTracker.advance(begin(), end(), &LiveIns[RegionIdx]); in getRealRegPressure()
549 LiveIns[CurRegion] = RPTracker.getLiveRegs(); in computeBlockPressure()
593 LiveIns.resize(Regions.size()); in finalizeSchedule()
811 << print(DAG.LiveIns[RegionIdx], DAG.MRI) in initGCNRegion()
813 << print(llvm::getRegPressure(DAG.MRI, DAG.LiveIns[RegionIdx])) in initGCNRegion()
1263 auto It = DAG.LiveIns[I].find(Reg); in collectRematerializableInstructions()
1264 if (It != DAG.LiveIns[I].end() && !It->second.none()) { in collectRematerializableInstructions()
1304 NewLiveIns[Idx] = DAG.LiveIns[Idx]; in sinkTriviallyRematInsts()
1448 DAG.LiveIns[Idx] = NewLiveIns[Idx]; in sinkTriviallyRematInsts()
DGCNIterativeScheduler.cpp82 const auto LiveIns = getLiveRegsBefore(*Begin, *LIS); in printLivenessInfo() local
83 OS << "LIn RP: " << print(getRegPressure(MRI, LiveIns)); in printLivenessInfo()
DGCNSchedStrategy.h206 SmallVector<GCNRPTracker::LiveRegSet, 32> LiveIns; variable
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/MIRParser/
DMIRParser.cpp632 for (const auto &LiveIn : YamlMF.LiveIns) { in parseRegisterInfo()