| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | MachineInstrBundle.cpp | 111 MachineBasicBlock::instr_iterator LastMI) { in getDebugLoc() argument
112 for (auto MII = FirstMI; MII != LastMI; ++MII) in getDebugLoc()
126 MachineBasicBlock::instr_iterator LastMI) { in finalizeBundle() argument
127 assert(FirstMI != LastMI && "Empty bundle?"); in finalizeBundle()
128 MIBundleBuilder Bundle(MBB, FirstMI, LastMI); in finalizeBundle()
135 BuildMI(MF, getDebugLoc(FirstMI, LastMI), TII->get(TargetOpcode::BUNDLE)); in finalizeBundle()
147 for (auto MII = FirstMI; MII != LastMI; ++MII) { in finalizeBundle()
234 for (auto MII = FirstMI; MII != LastMI; ++MII) { in finalizeBundle()
251 MachineBasicBlock::instr_iterator LastMI = std::next(FirstMI); in finalizeBundle() local
252 while (LastMI != E && LastMI->isInsideBundle()) in finalizeBundle()
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| D | RegisterCoalescer.cpp | 3084 MachineInstr *LastMI = in resolveConflicts() local
3086 assert(LastMI && "Range must end at a proper instruction"); in resolveConflicts()
3095 if (&*MI == LastMI) { in resolveConflicts()
3098 LastMI = Indexes->getInstructionFromIndex(TaintExtent[TaintNum].first); in resolveConflicts()
3099 assert(LastMI && "Range must end at a proper instruction"); in resolveConflicts()
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| D | MachinePipeliner.cpp | 960 MachineInstr *LastMI = MRI.getUniqueVRegDef(NewBase); in changeDependences() local
961 if (!LastMI) in changeDependences()
963 SUnit *LastSU = getSUnit(LastMI); in changeDependences()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMHazardRecognizer.cpp | 53 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { in getHazardType()
54 MachineInstr *DefMI = LastMI; in getHazardType()
55 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
61 if (!LastMI->isBarrier() && in getHazardType()
62 !(TII.getSubtarget().hasMuxedUnits() && LastMI->mayLoadOrStore()) && in getHazardType()
64 MachineBasicBlock::iterator I = LastMI; in getHazardType()
65 if (I != LastMI->getParent()->begin()) { in getHazardType()
85 LastMI = nullptr; in Reset()
92 LastMI = MI; in EmitInstruction()
100 LastMI = nullptr; in AdvanceCycle()
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| D | ARMHazardRecognizer.h | 33 MachineInstr *LastMI = nullptr; variable
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| D | ARMConstantIslandPass.cpp | 2049 MachineInstr *LastMI = &MBB->back(); in optimizeThumb2Branches() local
2050 BBUtils->adjustBBSize(MBB, -LastMI->getDesc().getSize()); in optimizeThumb2Branches()
2051 LastMI->eraseFromParent(); in optimizeThumb2Branches()
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| D | ARMBaseInstrInfo.cpp | 2121 MachineInstr *LastMI = &*Pred->rbegin(); in isProfitableToIfCvt() local
2122 if (LastMI->getOpcode() == ARM::t2Bcc) { in isProfitableToIfCvt()
2124 MachineInstr *CmpMI = findCMPToFoldIntoCBZ(LastMI, TRI); in isProfitableToIfCvt()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/ |
| D | VERegisterInfo.cpp | 382 MachineInstr *LastMI = nullptr; in processSTVM512() local
384 LastMI = build(VE::SVMmr, TmpReg).addReg(SrcLoReg).addImm(i); in processSTVM512()
392 LastMI->addRegisterKilled(SrcLoReg, &TRI, true); in processSTVM512()
402 LastMI = build(VE::SVMmr, TmpReg).addReg(SrcHiReg).addImm(3); in processSTVM512()
404 LastMI->addRegisterKilled(SrcHiReg, &TRI, true); in processSTVM512()
406 LastMI->addRegisterKilled(SrcReg, &TRI, true); in processSTVM512()
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/AsmPrinter/ |
| D | AsmPrinterInlineAsm.cpp | 442 if (LastMI != MI || LastFn != getFunctionNumber()) { in PrintSpecial()
444 LastMI = MI; in PrintSpecial()
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| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBundle.h | 29 MachineBasicBlock::instr_iterator LastMI);
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| D | AsmPrinter.h | 837 mutable const MachineInstr *LastMI = nullptr;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | SIWholeQuadMode.cpp | 695 MachineInstr *LastMI = &*MBB.rbegin(); in propagateBlock() local
696 InstrInfo &LastII = Instructions[LastMI]; in propagateBlock()
699 Worklist.push_back(LastMI); in propagateBlock()
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| D | SIInstrInfo.cpp | 675 MachineInstr *FirstMI = nullptr, *LastMI = nullptr; in expandSGPRCopy() local
694 LastMI = BuildMI(MBB, I, DL, TII.get(Opcode), RI.getSubReg(DestReg, SubIdx)) in expandSGPRCopy()
699 FirstMI = LastMI; in expandSGPRCopy()
705 assert(FirstMI && LastMI); in expandSGPRCopy()
707 std::swap(FirstMI, LastMI); in expandSGPRCopy()
713 LastMI->addRegisterKilled(SrcReg, &RI); in expandSGPRCopy()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 1819 MachineBasicBlock::instr_iterator LastMI(EndMI.getInstrIterator()); in endPacket() local
1820 finalizeBundle(*MBB, FirstMI, LastMI); in endPacket()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 7634 MachineInstr *LastMI = Selects.back(); in emitSelect() local
7636 (LastMI->killsRegister(SystemZ::CC) || checkCCKill(*LastMI, MBB)); in emitSelect()
7638 MachineBasicBlock *JoinMBB = SystemZ::splitBlockAfter(LastMI, MBB); in emitSelect()
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