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/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DLiveIntervalCalc.cpp33 static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc, in createDeadDef() argument
37 Indexes.getInstructionIndex(MI).getRegSlot(MO.isEarlyClobber()); in createDeadDef()
45 SlotIndexes *Indexes = getIndexes(); in calculate() local
48 assert(MRI && Indexes && "call reset() first"); in calculate()
72 [&MO, Indexes, Alloc](LiveInterval::SubRange &SR) { in calculate()
74 createDeadDef(*Indexes, *Alloc, SR, MO); in calculate()
76 *Indexes, TRI); in calculate()
82 createDeadDef(*Indexes, *Alloc, LI, MO); in calculate()
96 SubLIC.reset(MF, Indexes, DomTree, Alloc); in calculate()
126 SlotIndexes *Indexes = getIndexes(); in createDeadDefs() local
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DLiveRangeCalc.cpp55 Indexes = SI; in reset()
70 std::tie(Start, End) = Indexes->getMBBRange(MBB); in updateFromLiveIns()
90 assert(Indexes && "Missing SlotIndexes"); in extend()
93 MachineBasicBlock *UseMBB = Indexes->getMBBFromIndex(Use.getPrevSlot()); in extend()
97 auto EP = LR.extendInBlock(Undefs, Indexes->getMBBStartIdx(UseMBB), Use); in extend()
116 assert(Indexes && "Missing SlotIndexes"); in calculateValues()
154 std::tie(Begin, End) = Indexes->getMBBRange(&B); in isDefOnEntry()
214 const MachineInstr *MI = Indexes->getInstructionFromIndex(Use); in findReachingDefs()
243 std::tie(Start, End) = Indexes->getMBBRange(Pred); in findReachingDefs()
284 std::tie(Start, End) = Indexes->getMBBRange(BN); in findReachingDefs()
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DRegAllocPriorityAdvisor.h35 SlotIndexes *const Indexes);
44 SlotIndexes *const Indexes; variable
52 SlotIndexes *const Indexes) in DefaultPriorityAdvisor() argument
53 : RegAllocPriorityAdvisor(MF, RA, Indexes) {} in DefaultPriorityAdvisor()
DLiveIntervals.cpp125 Indexes = &getAnalysis<SlotIndexes>(); in runOnMachineFunction()
173 MF->print(OS, Indexes); in printInstrs()
220 RegMaskSlots.push_back(Indexes->getMBBStartIdx(&MBB)); in computeRegMasks()
229 RegMaskSlots.push_back(Indexes->getMBBStartIdx(&MBB)); in computeRegMasks()
237 RegMaskSlots.push_back(Indexes->getInstructionIndex(MI).getRegSlot()); in computeRegMasks()
248 Indexes->getInstructionIndex(MBB.back()).getRegSlot()); in computeRegMasks()
333 SlotIndex Begin = Indexes->getMBBStartIdx(&MBB); in computeLiveInRegUnits()
397 const MachineBasicBlock *MBB = Indexes->getMBBFromIndex(Idx.getPrevSlot()); in extendSegmentsToUses()
398 SlotIndex BlockStart = Indexes->getMBBStartIdx(MBB); in extendSegmentsToUses()
412 SlotIndex Stop = Indexes->getMBBEndIdx(Pred); in extendSegmentsToUses()
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DVirtRegMap.cpp188 SlotIndexes *Indexes; member in __anoncec7cf110111::VirtRegRewriter
261 Indexes = &getAnalysis<SlotIndexes>(); in runOnMachineFunction()
315 for (SlotIndexes::MBBIndexIterator MBBI = Indexes->findMBBIndex(First); in addLiveInsForSubRanges()
316 MBBI != Indexes->MBBIndexEnd() && MBBI->first <= Last; ++MBBI) { in addLiveInsForSubRanges()
364 SlotIndexes::MBBIndexIterator I = Indexes->MBBIndexBegin(); in addMBBLiveIns()
366 I = Indexes->advanceMBBIndex(I, Seg.start); in addMBBLiveIns()
367 for (; I != Indexes->MBBIndexEnd() && I->first < Seg.end; ++I) { in addMBBLiveIns()
434 if (Indexes) in handleIdentityCopy()
435 Indexes->removeSingleMachineInstrFromMaps(MI); in handleIdentityCopy()
503 if (Indexes && BundledMI != FirstMI) in expandCopyBundle()
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DMachineBasicBlock.cpp335 void MachineBasicBlock::print(raw_ostream &OS, const SlotIndexes *Indexes, in print() argument
347 print(OS, MST, Indexes, IsStandalone); in print()
351 const SlotIndexes *Indexes, in print() argument
360 if (Indexes && PrintSlotIndexes) in print()
361 OS << Indexes->getMBBStartIdx(this) << '\t'; in print()
373 if (Indexes) OS << '\t'; in print()
384 if (Indexes) OS << '\t'; in print()
415 if (Indexes) OS << '\t'; in print()
432 if (Indexes && PrintSlotIndexes) { in print()
433 if (Indexes->hasIndex(MI)) in print()
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DMLRegallocPriorityAdvisor.cpp80 SlotIndexes *const Indexes, MLModelRunner *Runner);
161 SlotIndexes *const Indexes, in DevelopmentModePriorityAdvisor() argument
163 : MLPriorityAdvisor(MF, RA, Indexes, Runner), Log(Log) {} in DevelopmentModePriorityAdvisor()
266 SlotIndexes *const Indexes, in MLPriorityAdvisor() argument
268 : RegAllocPriorityAdvisor(MF, RA, Indexes), DefaultAdvisor(MF, RA, Indexes), in MLPriorityAdvisor()
DRegAllocPriorityAdvisor.cpp108 SlotIndexes *const Indexes) in RegAllocPriorityAdvisor() argument
111 RegClassInfo(RA.getRegClassInfo()), Indexes(Indexes), in RegAllocPriorityAdvisor()
DStackColoring.cpp451 SlotIndexes *Indexes; member in __anon9bafa0030111::StackColoring
784 LLVM_DEBUG(Indexes->getInstructionIndex(MI).print(dbgs())); in collectMarkers()
874 Starts[pos] = Indexes->getMBBStartIdx(&MBB); in calculateLiveIntervals()
883 SlotIndex ThisIndex = Indexes->getInstructionIndex(MI); in calculateLiveIntervals()
912 SlotIndex EndIdx = Indexes->getMBBEndIdx(&MBB); in calculateLiveIntervals()
1062 SlotIndex Index = Indexes->getInstructionIndex(I); in remapInstructions()
1183 SlotIndex Index = Indexes->getInstructionIndex(I); in removeInvalidSlotRanges()
1214 Indexes = &getAnalysis<SlotIndexes>(); in runOnMachineFunction()
1259 LI->getNextValue(Indexes->getZeroIndex(), VNInfoAllocator); in runOnMachineFunction()
DInterferenceCache.h60 SlotIndexes *Indexes = nullptr; variable
107 Indexes = indexes; in clear()
DMachineVerifier.cpp214 SlotIndexes *Indexes; member
352 if (Indexes == nullptr) in verifySlotIndexes()
357 for (SlotIndexes::MBBIndexIterator I = Indexes->MBBIndexBegin(), in verifySlotIndexes()
358 E = Indexes->MBBIndexEnd(); I != E; ++I) { in verifySlotIndexes()
403 Indexes = nullptr; in verify()
410 Indexes = PASS->getAnalysisIfAvailable<SlotIndexes>(); in verify()
493 MF->print(errs(), Indexes); in report()
504 if (Indexes) in report()
505 errs() << " [" << Indexes->getMBBStartIdx(MBB) in report()
506 << ';' << Indexes->getMBBEndIdx(MBB) << ')'; in report()
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DLiveInterval.cpp431 const SlotIndexes &Indexes) const { in overlaps()
455 !CP.isCoalescable(Indexes.getInstructionFromIndex(Def))) in overlaps()
871 const SlotIndexes &Indexes, in stripValuesNotDefiningMask() argument
887 const MachineInstr *MI = Indexes.getInstructionFromIndex(VNI->def); in stripValuesNotDefiningMask()
919 const SlotIndexes &Indexes, const TargetRegisterInfo &TRI, in refineSubRanges() argument
940 stripValuesNotDefiningMask(reg(), *MatchingRange, Matching, Indexes, TRI, in refineSubRanges()
942 stripValuesNotDefiningMask(reg(), SR, SR.LaneMask, Indexes, TRI, in refineSubRanges()
965 const SlotIndexes &Indexes) const { in computeSubRangeUndefs()
980 SlotIndex Pos = Indexes.getInstructionIndex(MI).getRegSlot(EarlyClobber); in computeSubRangeUndefs()
DRenameIndependentSubregs.cpp304 const SlotIndexes &Indexes = *LIS->getSlotIndexes(); in computeMainRangesFixFlags() local
324 MachineBasicBlock &MBB = *Indexes.getMBBFromIndex(Def); in computeMainRangesFixFlags()
326 SlotIndex PredEnd = Indexes.getMBBEndIdx(PredMBB); in computeMainRangesFixFlags()
DRegisterCoalescer.cpp989 const SlotIndexes &Indexes = *LIS->getSlotIndexes(); in removeCopyByCommutingDef() local
1014 Indexes, *TRI); in removeCopyByCommutingDef()
2232 SlotIndexes *Indexes = LIS->getSlotIndexes(); in joinReservedPhysReg() local
2233 for (SlotIndex SI = Indexes->getNextNonNullIndex(DestRegIdx); in joinReservedPhysReg()
2234 SI != CopyRegIdx; SI = Indexes->getNextNonNullIndex(SI)) { in joinReservedPhysReg()
2362 SlotIndexes *Indexes; member in __anoncde421860311::JoinVals
2515 NewVNInfo(newVNInfo), CP(cp), LIS(lis), Indexes(LIS->getSlotIndexes()), in JoinVals()
2589 MachineInstr *MI = Indexes->getInstructionFromIndex(Def); in followCopyChain()
2678 DefMI = Indexes->getInstructionFromIndex(VNI->def); in analyzeValue()
2790 DefMI->getParent() != Indexes->getMBBFromIndex(V.OtherVNI->def)) { in analyzeValue()
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/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/
DLiveIntervals.h58 SlotIndexes* Indexes; variable
210 return Indexes; in getSlotIndexes()
216 return !Indexes->hasIndex(Instr); in isNotInMIMap()
221 return Indexes->getInstructionIndex(Instr); in getInstructionIndex()
226 return Indexes->getInstructionFromIndex(index); in getInstructionFromIndex()
231 return Indexes->getMBBStartIdx(mbb); in getMBBStartIdx()
236 return Indexes->getMBBEndIdx(mbb); in getMBBEndIdx()
250 return Indexes->getMBBFromIndex(index); in getMBBFromIndex()
254 Indexes->insertMBBInMaps(MBB); in insertMBBInMaps()
261 return Indexes->insertMachineInstrInMaps(MI); in InsertMachineInstrInMaps()
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DLiveRangeCalc.h48 SlotIndexes *Indexes = nullptr; variable
168 SlotIndexes *getIndexes() { return Indexes; } in getIndexes()
264 const SlotIndexes &Indexes);
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DSILowerSGPRSpills.cpp40 SlotIndexes *Indexes = nullptr; member in __anon6d15f8e70111::SILowerSGPRSpills
78 ArrayRef<CalleeSavedInfo> CSI, SlotIndexes *Indexes, in insertCSRSaves() argument
107 if (Indexes) { in insertCSRSaves()
110 Indexes->insertMachineInstrInMaps(Inst); in insertCSRSaves()
122 SlotIndexes *Indexes, LiveIntervals *LIS) { in insertCSRRestores() argument
147 if (Indexes) { in insertCSRRestores()
149 Indexes->insertMachineInstrInMaps(Inst); in insertCSRRestores()
236 insertCSRSaves(*SaveBlock, CSI, Indexes, LIS); in spillCalleeSavedRegs()
243 insertCSRRestores(*RestoreBlock, CSI, Indexes, LIS); in spillCalleeSavedRegs()
257 Indexes = getAnalysisIfAvailable<SlotIndexes>(); in runOnMachineFunction()
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DGCNRegPressure.h211 std::vector<SlotIndex> Indexes; in getLiveRegMap() local
212 Indexes.reserve(std::distance(R.begin(), R.end())); in getLiveRegMap()
216 Indexes.push_back(After ? SI.getDeadSlot() : SI.getBaseIndex()); in getLiveRegMap()
218 llvm::sort(Indexes); in getLiveRegMap()
229 if (!LI.findIndexesLiveAt(Indexes, std::back_inserter(LiveIdxs))) in getLiveRegMap()
DSIRegisterInfo.h141 SlotIndexes *Indexes = nullptr, LiveIntervals *LIS = nullptr,
145 SlotIndexes *Indexes = nullptr, LiveIntervals *LIS = nullptr,
162 SlotIndexes *Indexes = nullptr,
DSIRegisterInfo.cpp1707 RegScavenger *RS, SlotIndexes *Indexes, in spillSGPR() argument
1743 if (Indexes) { in spillSGPR()
1745 Indexes->replaceMachineInstrInMaps(*MI, *MIB); in spillSGPR()
1747 Indexes->insertMachineInstrInMaps(*MIB); in spillSGPR()
1792 if (Indexes) { in spillSGPR()
1794 Indexes->replaceMachineInstrInMaps(*MI, *WriteLane); in spillSGPR()
1796 Indexes->insertMachineInstrInMaps(*WriteLane); in spillSGPR()
1827 RegScavenger *RS, SlotIndexes *Indexes, in restoreSGPR() argument
1850 if (Indexes) { in restoreSGPR()
1852 Indexes->replaceMachineInstrInMaps(*MI, *MIB); in restoreSGPR()
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/openbsd/src/gnu/llvm/clang/lib/Analysis/
DCloneDetection.cpp482 std::vector<char> Indexes; in splitCloneGroups() local
483 Indexes.resize(HashGroup.size()); in splitCloneGroups()
487 if (Indexes[i]) in splitCloneGroups()
496 ++Indexes[i]; in splitCloneGroups()
501 if (Indexes[j]) in splitCloneGroups()
512 ++Indexes[j]; in splitCloneGroups()
520 assert(llvm::all_of(Indexes, [](char c) { return c == 1; })); in splitCloneGroups()
/openbsd/src/gnu/llvm/llvm/lib/Transforms/IPO/
DSampleProfileProbe.cpp229 std::vector<uint8_t> Indexes; in computeCFGHash() local
237 Indexes.push_back((uint8_t)(Index >> (J * 8))); in computeCFGHash()
241 JC.update(Indexes); in computeCFGHash()
244 (uint64_t)Indexes.size() << 32 | JC.getCRC(); in computeCFGHash()
251 << Indexes.size() << ", ICSites = " << CallProbeIds.size() in computeCFGHash()
/openbsd/src/gnu/llvm/clang/lib/Sema/
DSemaRISCVVectorLookup.cpp50 SmallVector<size_t, 8> Indexes; member
343 OverloadIntrinsicDef.Indexes.push_back(Index); in InitRVVIntrinsic()
414 for (auto Index : OvIntrinsicDef.Indexes) in CreateIntrinsicIfFound()
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86InstCombineIntrinsic.cpp815 int Indexes[64]; in simplifyX86pshufb() local
825 Indexes[I] = -1; in simplifyX86pshufb()
839 Indexes[I] = Index; in simplifyX86pshufb()
844 return Builder.CreateShuffleVector(V1, V2, ArrayRef(Indexes, NumElts)); in simplifyX86pshufb()
861 int Indexes[16]; in simplifyX86vpermilvar() local
870 Indexes[I] = -1; in simplifyX86vpermilvar()
887 Indexes[I] = Index.getZExtValue(); in simplifyX86vpermilvar()
891 return Builder.CreateShuffleVector(V1, ArrayRef(Indexes, NumElts)); in simplifyX86vpermilvar()
907 int Indexes[64]; in simplifyX86vpermv() local
915 Indexes[I] = -1; in simplifyX86vpermv()
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/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.cpp372 const SlotIndexes &Indexes = *LIS.getSlotIndexes(); in shouldCoalesce() local
373 auto HasCall = [&Indexes] (const LiveInterval::Segment &S) { in shouldCoalesce()
376 if (const MachineInstr *MI = Indexes.getInstructionFromIndex(I)) in shouldCoalesce()

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