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Searched refs:ImmOp (Results 1 – 25 of 41) sorted by relevance

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/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp107 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
109 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
111 const MachineOperand &ImmOp, unsigned ImmOpNum);
492 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses() local
501 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
559 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad() argument
578 MIB.add(ImmOp); in changeLoad()
587 const GlobalValue *GV = ImmOp.getGlobal(); in changeLoad()
588 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); in changeLoad()
590 MIB.addGlobalAddress(GV, Offset, ImmOp.getTargetFlags()); in changeLoad()
[all …]
DHexagonConstExtenders.cpp1780 const MachineOperand &ImmOp = MI.getOperand(IsAddi ? 2 : 1); in replaceInstrExpr() local
1781 assert(Ex.Rs == RegOp && EV == ImmOp && Ex.Neg != IsAddi && in replaceInstrExpr()
1897 MachineOperand &ImmOp = P.first->getOperand(J+1); in replaceInstr() local
1898 ImmOp.setImm(ImmOp.getImm() + Diff); in replaceInstr()
DHexagonAsmPrinter.cpp255 MCOperand &ImmOp = Inst.getOperand(i); in ScaleVectorOffset() local
256 const auto *HE = static_cast<const HexagonMCExpr*>(ImmOp.getExpr()); in ScaleVectorOffset()
/openbsd/src/gnu/llvm/llvm/lib/Target/VE/
DVEInstrPatternsVec.td43 multiclass vbrd_elem32<ValueType v32, ValueType s32, SDPatternOperator ImmOp,
46 def : Pat<(v32 (vec_broadcast (s32 ImmOp:$sy), i32:$vl)),
55 SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
57 def : Pat<(v64 (vec_broadcast (s64 ImmOp:$sy), i32:$vl)),
100 SDPatternOperator ImmOp, SDNodeXForm ImmCast,
102 defm : vbrd_elem32<v32, s32, ImmOp, ImmCast, SuperRegCast>;
107 SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
108 defm : vbrd_elem64<v64, s64, ImmOp, ImmCast>;
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86CallFrameOptimization.cpp291 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
292 return ImmOp.getImm() == 0 ? Convert : Exit; in classifyInstruction()
297 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
298 return ImmOp.getImm() == -1 ? Convert : Exit; in classifyInstruction()
DX86MCInstLower.cpp326 unsigned ImmOp = Inst.getNumOperands() - 1; in SimplifyShortImmForm() local
328 (Inst.getOperand(ImmOp).isImm() || Inst.getOperand(ImmOp).isExpr()) && in SimplifyShortImmForm()
340 MCOperand Saved = Inst.getOperand(ImmOp); in SimplifyShortImmForm()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DMachineDebugify.cpp128 auto ImmOp = MachineOperand::CreateImm(NextImm++); in applyDebugifyMetadataToMachineFunction() local
130 /*IsIndirect=*/false, ImmOp, LocalVar, Expr); in applyDebugifyMetadataToMachineFunction()
/openbsd/src/gnu/llvm/llvm/lib/Target/BPF/
DBPFMISimplifyPatchable.cpp132 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() local
133 if (!ImmOp.isImm() || ImmOp.getImm() != 0) in checkADDrr()
/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/
DRISCVMergeBaseOffset.cpp412 MachineOperand &ImmOp = Lo.getOperand(2); in foldIntoMemoryOps() local
414 ImmOp.setOffset(NewOffset); in foldIntoMemoryOps()
420 UseMI.addOperand(ImmOp); in foldIntoMemoryOps()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DThumbRegisterInfo.cpp394 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in rewriteFrameIndex() local
412 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
429 ImmOp.ChangeToImmediate(0); in rewriteFrameIndex()
433 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
DARMBaseInstrInfo.h873 unsigned ImmOp; in getAddSubImmediate() local
876 ImmOp = 2; in getAddSubImmediate()
880 ImmOp = 2; in getAddSubImmediate()
885 ImmOp = 3; in getAddSubImmediate()
891 return Scale * MI.getOperand(ImmOp).getImm(); in getAddSubImmediate()
DThumb2InstrInfo.cpp716 MachineOperand &ImmOp = MI.getOperand(FrameRegIdx+1); in rewriteT2FrameIndex() local
742 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteT2FrameIndex()
760 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteT2FrameIndex()
/openbsd/src/gnu/llvm/llvm/lib/Target/AVR/
DAVRISelDAGToDAG.cpp240 SDValue ImmOp = Op->getOperand(1); in SelectInlineAsmMemoryOperand() local
241 ConstantSDNode *ImmNode = dyn_cast<ConstantSDNode>(ImmOp); in SelectInlineAsmMemoryOperand()
281 Disp = ImmOp; in SelectInlineAsmMemoryOperand()
/openbsd/src/gnu/llvm/llvm/lib/Target/BPF/AsmParser/
DBPFAsmParser.cpp95 struct ImmOp { struct
103 ImmOp Imm;
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp911 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); in foldOperand() local
912 tryAddToFoldList(FoldList, UseMI, UseOpIdx, &ImmOp); in foldOperand()
1461 const MachineOperand *ImmOp = nullptr; in isOMod() local
1465 ImmOp = Src0; in isOMod()
1468 ImmOp = Src1; in isOMod()
1473 int OMod = getOModValue(Op, ImmOp->getImm()); in isOMod()
DSIFixSGPRCopies.cpp347 const MachineOperand *ImmOp = in isSafeToFoldImmIntoCopy() local
349 if (!ImmOp->isImm()) in isSafeToFoldImmIntoCopy()
366 Imm = ImmOp->getImm(); in isSafeToFoldImmIntoCopy()
DAMDGPUInstructionSelector.cpp2435 MachineOperand &ImmOp = I.getOperand(1); in selectG_CONSTANT() local
2440 if (ImmOp.isFPImm()) { in selectG_CONSTANT()
2441 const APInt &Imm = ImmOp.getFPImm()->getValueAPF().bitcastToAPInt(); in selectG_CONSTANT()
2442 ImmOp.ChangeToImmediate(Imm.getZExtValue()); in selectG_CONSTANT()
2443 } else if (ImmOp.isCImm()) { in selectG_CONSTANT()
2444 ImmOp.ChangeToImmediate(ImmOp.getCImm()->getSExtValue()); in selectG_CONSTANT()
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/AsmParser/
DX86Operand.h57 struct ImmOp { struct
85 struct ImmOp Imm;
/openbsd/src/gnu/llvm/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td1163 Operand ImmOp, ImmLeaf Imm, RegisterOperand ROWD,
1167 dag InOperandList = (ins ROWS:$ws, ImmOp:$m);
1191 SplatComplexPattern ImmOp, RegisterOperand ROWD,
1194 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, ImmOp, ROWD, ROWS, itin>;
1197 SplatComplexPattern ImmOp, RegisterOperand ROWD,
1200 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, ImmOp, ROWD, ROWS, itin>;
1214 ValueType VecTy, Operand ImmOp, ImmLeaf Imm,
1218 dag InOperandList = (ins ROWS:$ws, ImmOp:$n);
1226 Operand ImmOp, ImmLeaf Imm,
1229 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ImmOp:$n);
[all …]
DMipsDSPInstrInfo.td334 Operand ImmOp, ImmLeaf immPat, InstrItinClass itin,
337 dag InOperandList = (ins ImmOp:$imm);
389 Operand ImmOp, SDPatternOperator Imm,
392 dag InOperandList = (ins GPR32Opnd:$rs, ImmOp:$sa, GPR32Opnd:$src);
/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h658 MachineInstrBuilder buildSExtInReg(const DstOp &Res, const SrcOp &Op, int64_t ImmOp) { in buildSExtInReg() argument
659 return buildInstr(TargetOpcode::G_SEXT_INREG, {Res}, {Op, SrcOp(ImmOp)}); in buildSExtInReg()
764 int64_t ImmOp);
/openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/AsmParser/
DLanaiAsmParser.cpp128 struct ImmOp { struct
142 struct ImmOp Imm;
/openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp251 struct ImmOp { struct in __anon9b07b48e0211::SparcOperand
264 struct ImmOp Imm;
/openbsd/src/gnu/llvm/llvm/lib/Target/VE/AsmParser/
DVEAsmParser.cpp180 struct ImmOp { struct in __anon129a66720211::VEOperand
207 struct ImmOp Imm;
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp544 int64_t ImmOp) { in buildZExtInReg() argument
547 ResTy, APInt::getLowBitsSet(ResTy.getScalarSizeInBits(), ImmOp)); in buildZExtInReg()

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