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Searched refs:I3 (Results 1 – 25 of 42) sorted by relevance

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/openbsd/src/gnu/usr.bin/binutils-2.17/opcodes/
Dmips16-opc.c61 #define I3 INSN_ISA3 macro
113 {"dla", "y,E", 0xfe00, 0xff00, WR_y|RD_PC, 0, I3 },
114 {"daddiu", "y,x,4", 0x4010, 0xf810, WR_y|RD_x, 0, I3 },
115 {"daddiu", "y,j", 0xfd00, 0xff00, WR_y|RD_y, 0, I3 },
116 {"daddiu", "S,K", 0xfb00, 0xff00, WR_SP|RD_SP, 0, I3 },
117 {"daddiu", "S,S,K", 0xfb00, 0xff00, WR_SP|RD_SP, 0, I3 },
118 {"daddiu", "y,P,W", 0xfe00, 0xff00, WR_y|RD_PC, 0, I3 },
119 {"daddiu", "y,S,W", 0xff00, 0xff00, WR_y|RD_SP, 0, I3 },
120 {"daddu", "z,v,y", 0xe000, 0xf803, WR_z|RD_x|RD_y, 0, I3 },
121 {"daddu", "y,x,4", 0x4010, 0xf810, WR_y|RD_x, 0, I3 },
[all …]
Dmips-opc.c84 #define I3 INSN_ISA3 macro
181 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, INSN2_ALIAS, I3 },/* daddu */
463 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, 0, I3|I32|T3},
464 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
465 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 },
486 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
489 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
490 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S|FP_S, 0, I3|I33 },
491 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S|FP_S, 0, I3|I33 },
501 {"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, 0, I3 },
[all …]
/openbsd/src/gnu/usr.bin/binutils/opcodes/
Dmips16-opc.c61 #define I3 INSN_ISA3 macro
113 {"dla", "y,E", 0xfe00, 0xff00, WR_y|RD_PC, I3 },
114 {"daddiu", "y,x,4", 0x4010, 0xf810, WR_y|RD_x, I3 },
115 {"daddiu", "y,j", 0xfd00, 0xff00, WR_y|RD_y, I3 },
116 {"daddiu", "S,K", 0xfb00, 0xff00, WR_SP|RD_SP, I3 },
117 {"daddiu", "S,S,K", 0xfb00, 0xff00, WR_SP|RD_SP, I3 },
118 {"daddiu", "y,P,W", 0xfe00, 0xff00, WR_y|RD_PC, I3 },
119 {"daddiu", "y,S,W", 0xff00, 0xff00, WR_y|RD_SP, I3 },
120 {"daddu", "z,v,y", 0xe000, 0xf803, WR_z|RD_x|RD_y, I3 },
121 {"daddu", "y,x,4", 0x4010, 0xf810, WR_y|RD_x, I3 },
[all …]
Dmips-opc.c84 #define I3 INSN_ISA3 macro
150 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
439 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|I32|T3},
440 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
441 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
456 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
459 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
460 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
461 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
471 {"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
[all …]
/openbsd/src/gnu/usr.bin/gcc/gcc/testsuite/g77.dg/
Df77-edit-s-out.f8 10 format(SP,I3,1X,SS,I3)
9 20 format(SP,I3,1X,SS,I3,SP,I3)
10 30 format(SP,I3,1X,SS,I3,S,I3)
11 40 format(SP,I3)
/openbsd/src/gnu/llvm/compiler-rt/lib/scudo/standalone/tests/
Dlist_test.cpp31 ListItem *I3 = nullptr) { in setList() argument
37 if (I3) in setList()
38 L->push_back(I3); in setList()
43 ListItem *I3 = nullptr, ListItem *I4 = nullptr, in checkList() argument
53 if (I3) { in checkList()
54 EXPECT_EQ(L->front(), I3); in checkList()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64SchedThunderX3T110.td78 // Branch micro-ops on ports I2/I3.
81 // Branch micro-ops on ports I1/I2/I3.
87 // Integer micro-ops on ports I0/I1/I2/I3.
157 // 1 cycle on I2/I3
163 // 8 cycles on I2/I3
169 // 1 cycle on I1/I2/I3
175 // 8 cycles on I1/I2/I3
181 // 1 cycle on I0/I1/I2/I3.
187 // 2 cycles on I0/I1/I2/I3.
193 // 3 cycles on I0/I1/I2/I3.
[all …]
/openbsd/src/regress/lib/libcrypto/x509/bettertls/certificates/
D392.crt11 I3+v9WV+PCcoESmqTluN8HbqYowK3zY98LPwG4n1lR2kYwTXvPyCEghKL1niFPlv
D3358.crt13 zVhjQi7pKZc9Zx7lZtllNw+OvLbX6RB2CsTq23GOHTOScyfKlmYl2SdRlGHa/9I3
D2940.key3 WmV8pJLAJ/zPJhLDU+I3+vpAbzPgMoc/Qc1qtArwQ3ueS60hGJJ5lGhxGiKeBAfx
/openbsd/src/gnu/gcc/libgomp/testsuite/libgomp.fortran/
Domp_workshare1.f40 100 FORMAT(' Thread',I2,': C(',I3,')=',F8.2)
/openbsd/src/sys/dev/pci/drm/i915/
Dintel_step.h60 func(I3) \
/openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/
DSystemZInstrFormats.td375 bits<8> I3;
382 let Inst{31-24} = I3;
917 bits<4> I3;
921 let Inst{35-32} = I3;
1039 bits<8> I3;
1046 let Inst{23-16} = I3;
1106 bits<12> I3;
1113 let Inst{31-20} = I3;
1154 bits<8> I3;
1163 let Inst{19-12} = I3;
[all …]
DSystemZInstrInfo.td2299 imm32zx12:$I3, imm32zx4:$M4, imm32zx4:$M5),
2300 ".insn vri,$enc,$V1,$V2,$I3,$M4,$M5", []>;
2320 bdaddr12only:$BD2, imm32zx8:$I3),
2321 ".insn vsi,$enc,$V1,$BD2,$I3", []>;
/openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/
DSparcCallingConv.td21 CCIfType<[i32, f32], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
34 CCIfType<[i32], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
DSparcRegisterInfo.td158 def I3 : Ri<27, "I3">, DwarfRegNum<[27]>;
301 def I2_I3 : Rdi<26, "I2", [I2, I3]>;
DSparcISelLowering.cpp60 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_Split_64()
86 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_Ret_Split_64()
583 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in LowerFormalArguments_32()
1118 .Case("i0", SP::I0).Case("i1", SP::I1).Case("i2", SP::I2).Case("i3", SP::I3) in getRegisterByName()
/openbsd/src/gnu/usr.bin/binutils-2.17/cpu/
Dfrv.opc280 /* I2 */ UNIT_NIL, /* no I2 or I3 unit */
281 /* I3 */ UNIT_NIL,
315 /* I2 */ UNIT_NIL, /* no I2 or I3 unit */
316 /* I3 */ UNIT_NIL,
347 /* I2 */ UNIT_NIL, /* no I2 or I3 unit */
348 /* I3 */ UNIT_NIL,
380 /* I3 */ UNIT_I3,
/openbsd/src/gnu/usr.bin/binutils/gdb/
Dsparc-stub.c113 I0, I1, I2, I3, I4, I5, FP, I7, enumerator
/openbsd/src/gnu/usr.bin/binutils/cpu/
Dfrv.opc273 /* I2 */ UNIT_NIL, /* no I2 or I3 unit */
274 /* I3 */ UNIT_NIL,
304 /* I2 */ UNIT_NIL, /* no I2 or I3 unit */
305 /* I3 */ UNIT_NIL,
336 /* I3 */ UNIT_I3,
/openbsd/src/gnu/gcc/gcc/config/soft-fp/
Dop-4.h523 #define __FP_FRAC_SET_4(X,I3,I2,I1,I0) \ argument
524 (X##_f[3] = I3, X##_f[2] = I2, X##_f[1] = I1, X##_f[0] = I0)
/openbsd/src/gnu/llvm/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.td205 multiclass I3<string OpcStr, SDNode OpNode> {
714 defm ADD : I3<"add.s", add>;
715 defm SUB : I3<"sub.s", sub>;
725 defm MULT : I3<"mul.lo.s", mul>;
727 defm MULTHS : I3<"mul.hi.s", mulhs>;
728 defm MULTHU : I3<"mul.hi.u", mulhu>;
730 defm SDIV : I3<"div.s", sdiv>;
731 defm UDIV : I3<"div.u", udiv>;
735 defm SREM : I3<"rem.s", srem>;
736 defm UREM : I3<"rem.u", urem>;
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp67 SP::I0, SP::I1, SP::I2, SP::I3,
/openbsd/src/gnu/usr.bin/binutils-2.17/gas/doc/
Dc-bfin.texi139 The set of 32-bit registers (I0, I1, I2, I3) that normally contain byte
/openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp151 Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3,

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