| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 118 void HexagonInstrInfo::anchor() {} in anchor()
120 HexagonInstrInfo::HexagonInstrInfo(HexagonSubtarget &ST) in HexagonInstrInfo() function in HexagonInstrInfo
154 bool HexagonInstrInfo::isAsCheapAsAMove(const MachineInstr &MI) const { in isAsCheapAsAMove()
185 bool HexagonInstrInfo::shouldSink(const MachineInstr &MI) const { in shouldSink()
197 MachineInstr *HexagonInstrInfo::findLoopInstr(MachineBasicBlock *BB, in findLoopInstr()
288 unsigned HexagonInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
336 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
386 bool HexagonInstrInfo::hasLoadFromStackSlot( in hasLoadFromStackSlot()
404 bool HexagonInstrInfo::hasStoreToStackSlot( in hasStoreToStackSlot()
434 bool HexagonInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
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| D | HexagonFrameLowering.h | 24 class HexagonInstrInfo; variable
116 void expandAlloca(MachineInstr *AI, const HexagonInstrInfo &TII,
133 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
136 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
139 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
142 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
145 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
148 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
151 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
154 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
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| D | HexagonBitTracker.h | 18 class HexagonInstrInfo; variable
32 const HexagonInstrInfo &tii, MachineFunction &mf);
48 const HexagonInstrInfo &TII;
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| D | HexagonHazardRecognizer.h | 24 const HexagonInstrInfo *TII;
49 const HexagonInstrInfo *HII, in HexagonHazardRecognizer()
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| D | HexagonSubtarget.h | 87 bool shouldTFRICallBind(const HexagonInstrInfo &HII,
103 HexagonInstrInfo InstrInfo;
124 const HexagonInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
352 bool isBestZeroLatency(SUnit *Src, SUnit *Dst, const HexagonInstrInfo *TII,
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| D | HexagonVLIWPacketizer.h | 19 class HexagonInstrInfo; variable
76 const HexagonInstrInfo *HII;
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| D | HexagonFixupHwLoops.cpp | 112 const HexagonInstrInfo *HII = in fixupLoopInstrs()
113 static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in fixupLoopInstrs()
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| D | HexagonISelDAGToDAG.h | 26 class HexagonInstrInfo; variable
31 const HexagonInstrInfo *HII;
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| D | HexagonSubtarget.cpp | 269 auto *QII = static_cast<const HexagonInstrInfo*>(DAG->TII); in apply()
303 const HexagonInstrInfo &HII, const SUnit &Inst1, in shouldTFRICallBind()
386 const auto &HII = static_cast<const HexagonInstrInfo&>(*DAG->TII); in apply()
447 const HexagonInstrInfo *QII = getInstrInfo(); in adjustSchedDependency()
550 auto &QII = static_cast<const HexagonInstrInfo &>(*getInstrInfo()); in updateLatency()
635 const HexagonInstrInfo *TII, SmallSet<SUnit*, 4> &ExclSrc, in isBestZeroLatency()
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| D | HexagonNewValueJump.cpp | 95 const HexagonInstrInfo *QII;
116 static bool canBeFeederToNewValueJump(const HexagonInstrInfo *QII, in INITIALIZE_PASS_DEPENDENCY()
237 static bool canCompareBeNewValueJump(const HexagonInstrInfo *QII, in canCompareBeNewValueJump()
459 QII = static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| D | HexagonVectorPrint.cpp | 54 const HexagonInstrInfo *QII = nullptr;
98 const DebugLoc &DL, const HexagonInstrInfo *QII, in addAsmInstr()
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| D | HexagonPeephole.cpp | 82 const HexagonInstrInfo *QII;
113 QII = static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| D | HexagonMachineScheduler.cpp | 28 const auto *QII = static_cast<const HexagonInstrInfo *>(TII); in hasDependence()
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| D | CMakeLists.txt | 40 HexagonInstrInfo.cpp
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| D | HexagonInstrInfo.h | 38 class HexagonInstrInfo : public HexagonGenInstrInfo {
48 explicit HexagonInstrInfo(HexagonSubtarget &ST);
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| D | HexagonBranchRelaxation.cpp | 69 const HexagonInstrInfo *HII;
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| D | HexagonBitSimplify.cpp | 252 uint16_t Begin, const HexagonInstrInfo &HII);
652 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits()
995 const HexagonInstrInfo &HII;
1081 RedundantInstrElimination(BitTracker &bt, const HexagonInstrInfo &hii, in RedundantInstrElimination()
1097 const HexagonInstrInfo &HII;
1403 ConstGeneration(BitTracker &bt, const HexagonInstrInfo &hii, in ConstGeneration()
1415 const HexagonInstrInfo &HII;
1534 CopyGeneration(BitTracker &bt, const HexagonInstrInfo &hii, in CopyGeneration()
1544 const HexagonInstrInfo &HII;
1776 const HexagonInstrInfo &hii, const HexagonRegisterInfo &hri, in BitSimplification()
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| D | HexagonFrameLowering.cpp | 1718 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandCopy()
1739 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreInt()
1772 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadInt()
1803 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreVecPred()
1840 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadVecPred()
1875 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreVec2()
1935 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadVec2()
1976 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreVec()
2005 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadVec()
2486 const HexagonInstrInfo &HII, Register SP, unsigned CF) const { in expandAlloca()
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| D | HexagonVLIWPacketizer.cpp | 116 const HexagonInstrInfo *HII = nullptr;
567 const HexagonInstrInfo *HII) { in getPredicateSense()
576 const HexagonInstrInfo *HII) { in getPostIncrementOperand()
949 const HexagonInstrInfo *QII) { in getPredicatedRegister()
1106 const HexagonInstrInfo &HII) { in cannotCoexistAsymm()
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| D | HexagonVExtract.cpp | 55 const HexagonInstrInfo *HII = nullptr;
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| D | HexagonCopyToCombine.cpp | 60 const HexagonInstrInfo *TII;
125 static bool isCombinableInstType(MachineInstr &MI, const HexagonInstrInfo *TII, in isCombinableInstType()
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| D | HexagonRDFOpt.cpp | 220 auto &HII = static_cast<const HexagonInstrInfo&>(DFG.getTII()); in rewrite()
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| D | Hexagon.td | 392 def HexagonInstrInfo : InstrInfo;
502 let InstructionSet = HexagonInstrInfo;
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| D | HexagonGenMux.cpp | 88 const HexagonInstrInfo *HII = nullptr;
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| /openbsd/src/gnu/llvm/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/ |
| D | BUILD.gn | 68 "HexagonInstrInfo.cpp",
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