Searched refs:GPR_32 (Results 1 – 6 of 6) sorted by relevance
| /openbsd/src/gnu/gcc/gcc/config/frv/ |
| D | frv.opt | 108 Target Report RejectNegative Mask(GPR_32) 112 Target Report RejectNegative InverseMask(GPR_32, GPR_64)
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86GenRegisterBankInfo.def | 57 INSTR_3OP(BREAKDOWN(PMI_GPR32, 1)) // 6: GPR_32
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| D | X86CallingConv.td | 37 list<Register> GPR_32 = []; 50 let GPR_32 = [EAX, ECX, EDX, EDI, ESI]; 70 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R10D, R11D, R12D, R14D, R15D]; 77 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R12D, R13D, R14D, R15D]; 95 CCIfType<[i32], CCAssignToReg<RC.GPR_32>>, 174 CCIfType<[i32], CCAssignToReg<RC.GPR_32>>,
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 266 class GPR_32 { list<Predicate> GPRPredicates = [IsGP32bit]; } 2703 GPR_32, ISA_MIPS1; 2706 GPR_32, ISA_MIPS1; 2735 "sge\t$rd, $rs, $imm">, GPR_32; 2739 GPR_32; 2749 "sgeu\t$rd, $rs, $imm">, GPR_32; 2753 GPR_32; 2764 "sgt\t$rd, $rs, $imm">, GPR_32; 2768 GPR_32; 2778 "sgtu\t$rd, $rs, $imm">, GPR_32; [all …]
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| D | Mips32r6InstrInfo.td | 958 def SELEQZ : R6MMR6Rel, SELEQZ_ENC, SELEQZ_DESC, ISA_MIPS32R6, GPR_32; 959 def SELNEZ : R6MMR6Rel, SELNEZ_ENC, SELNEZ_DESC, ISA_MIPS32R6, GPR_32; 1002 ISA_MIPS32R6, GPR_32; 1005 def : MipsInstAlias<"jrc $rs", (JIC GPR32Opnd:$rs, 0), 1>, ISA_MIPS32R6, GPR_32; 1009 ISA_MIPS32R6, GPR_32;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6608 static const MCPhysReg GPR_32[] = {// 32-bit registers. in CC_AIX() local 6640 if (unsigned Reg = State.AllocateReg(IsPPC64 ? GPR_64 : GPR_32)) in CC_AIX() 6667 if (unsigned Reg = State.AllocateReg(IsPPC64 ? GPR_64 : GPR_32)) in CC_AIX() 6688 if (unsigned Reg = State.AllocateReg(IsPPC64 ? GPR_64 : GPR_32)) { in CC_AIX() 6741 ArrayRef<MCPhysReg> GPRs = IsPPC64 ? GPR_64 : GPR_32; in CC_AIX() 7191 static const MCPhysReg GPR_32[] = {PPC::R3, PPC::R4, PPC::R5, PPC::R6, in LowerFormalArguments_AIX() local 7196 const unsigned NumGPArgRegs = std::size(IsPPC64 ? GPR_64 : GPR_32); in LowerFormalArguments_AIX() 7207 : MF.addLiveIn(GPR_32[GPRIndex], &PPC::GPRCRegClass); in LowerFormalArguments_AIX()
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