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Searched refs:GCR_TARGET_DISABLE__DISABLE_SE0_PHY_MASK (Results 1 – 3 of 3) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h21344 #define GCR_TARGET_DISABLE__DISABLE_SE0_PHY_MASK … macro
Dgc_12_0_0_sh_mask.h14301 #define GCR_TARGET_DISABLE__DISABLE_SE0_PHY_MASK … macro
Dgc_11_0_3_sh_mask.h27765 #define GCR_TARGET_DISABLE__DISABLE_SE0_PHY_MASK … macro