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Searched refs:GCR_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h29124 #define GCR_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_11_0_0_sh_mask.h33369 #define GCR_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_12_0_0_sh_mask.h18965 #define GCR_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_11_0_3_sh_mask.h35855 #define GCR_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_10_1_0_sh_mask.h32693 #define GCR_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_10_3_0_sh_mask.h31221 #define GCR_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro