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Searched refs:GCMC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h10460 #define GCMC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
Dgc_11_0_0_sh_mask.h13272 #define GCMC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
Dgc_12_0_0_sh_mask.h11280 #define GCMC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
Dgc_11_0_3_sh_mask.h15338 #define GCMC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
Dgc_10_1_0_sh_mask.h33025 #define GCMC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro
Dgc_10_3_0_sh_mask.h31550 #define GCMC_VM_L2_PERFCOUNTER5_CFG__PERF_SEL__SHIFT … macro