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Searched refs:FRC (Results 1 – 8 of 8) sorted by relevance

/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonBitSimplify.cpp1373 const TargetRegisterClass *FRC = HBS::getFinalVRegClass(RD, MRI); in processBlock() local
1374 Register NewR = MRI.createVirtualRegister(FRC); in processBlock()
1578 auto *FRC = HBS::getFinalVRegClass(Inp, MRI); in findMatch() local
1589 if (FRC != MRI.getRegClass(R)) in findMatch()
1642 auto *FRC = HBS::getFinalVRegClass(R, MRI); in processBlock() local
1645 Register NewR = MRI.createVirtualRegister(FRC); in processBlock()
1654 if (FRC == &Hexagon::DoubleRegsRegClass || in processBlock()
1655 FRC == &Hexagon::HvxWRRegClass) { in processBlock()
1657 unsigned SubLo = HRI.getHexagonSubRegIndex(*FRC, Hexagon::ps_sub_lo); in processBlock()
1658 unsigned SubHi = HRI.getHexagonSubRegIndex(*FRC, Hexagon::ps_sub_hi); in processBlock()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86InstrAVX512.td104 RegisterClass FRC = !if (!eq (EltTypeName, "f32"), FR32X,
1196 def : Pat<(DestInfo.VT (X86VBroadcast SrcInfo.FRC:$src)),
1198 (SrcInfo.VT (COPY_TO_REGCLASS SrcInfo.FRC:$src, SrcInfo.RC)))>;
1200 (X86VBroadcast SrcInfo.FRC:$src),
1204 (SrcInfo.VT (COPY_TO_REGCLASS SrcInfo.FRC:$src, SrcInfo.RC)))>;
1206 (X86VBroadcast SrcInfo.FRC:$src),
1209 DestInfo.KRCWM:$mask, (SrcInfo.VT (COPY_TO_REGCLASS SrcInfo.FRC:$src, SrcInfo.RC)))>;
2140 (outs _.KRC:$dst), (ins _.FRC:$src1, _.FRC:$src2, u8imm:$cc),
2143 [(set _.KRC:$dst, (OpNode _.FRC:$src1,
2144 _.FRC:$src2,
[all …]
/openbsd/src/regress/lib/libcrypto/x509/bettertls/certificates/
D3117.chain19 FRC//QLlNWNXTuluoLBq4VqKt5p4SMN8Ph9gz6oWLNcsWOftflHi7oLwNu88/jjm
/openbsd/src/gnu/usr.bin/binutils-2.17/opcodes/
Dppc-opc.c284 #define FRC FRB + 1 macro
290 #define FRS FRC + 1
4522 { "fmuls", A(59,25,0), AFRB_MASK, PPC, { FRT, FRA, FRC } },
4523 { "fmuls.", A(59,25,1), AFRB_MASK, PPC, { FRT, FRA, FRC } },
4528 { "fmsubs", A(59,28,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4529 { "fmsubs.", A(59,28,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4531 { "fmadds", A(59,29,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4532 { "fmadds.", A(59,29,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4534 { "fnmsubs", A(59,30,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4535 { "fnmsubs.",A(59,30,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
[all …]
/openbsd/src/gnu/usr.bin/binutils/opcodes/
Dppc-opc.c279 #define FRC FRB + 1 macro
285 #define FRS FRC + 1
4424 { "fmuls", A(59,25,0), AFRB_MASK, PPC, { FRT, FRA, FRC } },
4425 { "fmuls.", A(59,25,1), AFRB_MASK, PPC, { FRT, FRA, FRC } },
4427 { "fmsubs", A(59,28,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4428 { "fmsubs.", A(59,28,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4430 { "fmadds", A(59,29,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4431 { "fmadds.", A(59,29,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4433 { "fnmsubs", A(59,30,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
4434 { "fnmsubs.",A(59,30,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCInstrInfo.td2877 (outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRC, f8rc:$FRB),
2878 "fmadd", "$FRT, $FRA, $FRC, $FRB", IIC_FPFused,
2879 [(set f64:$FRT, (any_fma f64:$FRA, f64:$FRC, f64:$FRB))]>;
2881 (outs f4rc:$FRT), (ins f4rc:$FRA, f4rc:$FRC, f4rc:$FRB),
2882 "fmadds", "$FRT, $FRA, $FRC, $FRB", IIC_FPGeneral,
2883 [(set f32:$FRT, (any_fma f32:$FRA, f32:$FRC, f32:$FRB))]>;
2885 (outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRC, f8rc:$FRB),
2886 "fmsub", "$FRT, $FRA, $FRC, $FRB", IIC_FPFused,
2888 (any_fma f64:$FRA, f64:$FRC, (fneg f64:$FRB)))]>;
2890 (outs f4rc:$FRT), (ins f4rc:$FRA, f4rc:$FRC, f4rc:$FRB),
[all …]
DPPCInstrFormats.td1787 bits<5> FRC;
1797 let Inst{21-25} = FRC;
1805 let FRC = 0;
/openbsd/src/gnu/llvm/llvm/docs/
DCodeGenerator.rst1052 (ops F4RC:$FRT, F4RC:$FRA, F4RC:$FRC, F4RC:$FRB),
1053 "fmadds $FRT, $FRA, $FRC, $FRB",
1054 [(set F4RC:$FRT, (fadd (fmul F4RC:$FRA, F4RC:$FRC),