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Searched refs:FLOG (Results 1 – 25 of 26) sorted by relevance

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/openbsd/src/usr.bin/awk/
Dawk.h148 #define FLOG 4 macro
Dlex.c75 { "log", FLOG, BLTIN },
Drun.c2075 case FLOG: in bltin()
/openbsd/src/gnu/llvm/llvm/include/llvm/IR/
DConstrainedOps.def78 DAG_FUNCTION(log, 1, 1, experimental_constrained_log, FLOG)
/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/
DISDOpcodes.h918 FLOG, enumerator
DBasicTTIImpl.h1783 ISD = ISD::FLOG; in getTypeBasedIntrinsicInstrCost()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp225 case ISD::FLOG: return "flog"; in getOperationName()
DLegalizeFloatTypes.cpp93 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break; in SoftenFloatResult()
1238 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break; in ExpandFloatResult()
2264 case ISD::FLOG: in PromoteFloatResult()
2629 case ISD::FLOG: in SoftPromoteHalfResult()
DLegalizeVectorOps.cpp373 case ISD::FLOG: in LegalizeOp()
DLegalizeVectorTypes.cpp92 case ISD::FLOG: in ScalarizeVectorResult()
1037 case ISD::FLOG: in SplitVectorResult()
4082 case ISD::FLOG: in WidenVectorResult()
DLegalizeDAG.cpp4065 case ISD::FLOG: in ConvertNodeToLibcall()
4881 case ISD::FLOG: in PromoteNode()
DSelectionDAGBuilder.cpp5182 return DAG.getNode(ISD::FLOG, dl, Op.getValueType(), Op, Flags); in expandLog()
DSelectionDAG.cpp4861 case ISD::FLOG: in isKnownNeverNaN()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DTargetLoweringBase.cpp898 setOperationAction({ISD::FCBRT, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, ISD::FEXP, in initActions()
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp331 setOperationAction({ISD::FLOG, ISD::FLOG10, ISD::FEXP}, MVT::f32, Custom); in AMDGPUTargetLowering()
449 ISD::FEXP, ISD::FLOG2, ISD::FREM, ISD::FLOG, in AMDGPUTargetLowering()
1261 case ISD::FLOG: in LowerOperation()
DAMDGPUISelDAGToDAG.cpp157 case ISD::FLOG: in fp16SrcZerosHighBits()
DSIISelLowering.cpp416 setOperationAction({ISD::FLOG, ISD::FEXP, ISD::FLOG10}, MVT::f16, Custom); in SITargetLowering()
/openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp243 for (auto Op : {ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, in WebAssemblyTargetLowering()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMISelLowering.cpp369 setOperationAction(ISD::FLOG, VT, Expand); in addMVEVectorTypes()
878 setOperationAction(ISD::FLOG, MVT::v2f64, Expand); in ARMTargetLowering()
899 setOperationAction(ISD::FLOG, MVT::v4f32, Expand); in ARMTargetLowering()
915 setOperationAction(ISD::FLOG, MVT::v2f32, Expand); in ARMTargetLowering()
1048 setOperationAction(ISD::FLOG, MVT::f64, Expand); in ARMTargetLowering()
1529 setOperationAction(ISD::FLOG, MVT::f16, Promote); in ARMTargetLowering()
/openbsd/src/gnu/llvm/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp151 setOperationAction(ISD::FLOG, MVT::f16, Promote); in MipsSETargetLowering()
DMipsISelLowering.cpp427 setOperationAction(ISD::FLOG, MVT::f32, Expand); in MipsTargetLowering()
/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1635 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp400 setOperationAction(ISD::FLOG, MVT::f64, Custom); in PPCTargetLowering()
406 setOperationAction(ISD::FLOG, MVT::f32, Custom); in PPCTargetLowering()
840 setOperationAction(ISD::FLOG, VT, Expand); in PPCTargetLowering()
11303 case ISD::FLOG: return lowerLog(Op, DAG); in LowerOperation()
/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp370 ISD::FEXP2, ISD::FLOG, ISD::FLOG2, ISD::FLOG10}, in RISCVTargetLowering()
733 setOperationAction(ISD::FLOG, VT, Expand); in RISCVTargetLowering()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp651 ISD::FEXP, ISD::FEXP2, ISD::FLOG, in AArch64TargetLowering()
1407 setOperationAction(ISD::FLOG, VT, Expand); in AArch64TargetLowering()
1563 setOperationAction(ISD::FLOG, VT, Expand); in addTypeForNEON()

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