| /openbsd/src/usr.bin/awk/ |
| D | awk.h | 148 #define FLOG 4 macro
|
| D | lex.c | 75 { "log", FLOG, BLTIN },
|
| D | run.c | 2075 case FLOG: in bltin()
|
| /openbsd/src/gnu/llvm/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 78 DAG_FUNCTION(log, 1, 1, experimental_constrained_log, FLOG)
|
| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 918 FLOG, enumerator
|
| D | BasicTTIImpl.h | 1783 ISD = ISD::FLOG; in getTypeBasedIntrinsicInstrCost()
|
| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 225 case ISD::FLOG: return "flog"; in getOperationName()
|
| D | LegalizeFloatTypes.cpp | 93 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break; in SoftenFloatResult() 1238 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break; in ExpandFloatResult() 2264 case ISD::FLOG: in PromoteFloatResult() 2629 case ISD::FLOG: in SoftPromoteHalfResult()
|
| D | LegalizeVectorOps.cpp | 373 case ISD::FLOG: in LegalizeOp()
|
| D | LegalizeVectorTypes.cpp | 92 case ISD::FLOG: in ScalarizeVectorResult() 1037 case ISD::FLOG: in SplitVectorResult() 4082 case ISD::FLOG: in WidenVectorResult()
|
| D | LegalizeDAG.cpp | 4065 case ISD::FLOG: in ConvertNodeToLibcall() 4881 case ISD::FLOG: in PromoteNode()
|
| D | SelectionDAGBuilder.cpp | 5182 return DAG.getNode(ISD::FLOG, dl, Op.getValueType(), Op, Flags); in expandLog()
|
| D | SelectionDAG.cpp | 4861 case ISD::FLOG: in isKnownNeverNaN()
|
| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 898 setOperationAction({ISD::FCBRT, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, ISD::FEXP, in initActions()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 331 setOperationAction({ISD::FLOG, ISD::FLOG10, ISD::FEXP}, MVT::f32, Custom); in AMDGPUTargetLowering() 449 ISD::FEXP, ISD::FLOG2, ISD::FREM, ISD::FLOG, in AMDGPUTargetLowering() 1261 case ISD::FLOG: in LowerOperation()
|
| D | AMDGPUISelDAGToDAG.cpp | 157 case ISD::FLOG: in fp16SrcZerosHighBits()
|
| D | SIISelLowering.cpp | 416 setOperationAction({ISD::FLOG, ISD::FEXP, ISD::FLOG10}, MVT::f16, Custom); in SITargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 243 for (auto Op : {ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, in WebAssemblyTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 369 setOperationAction(ISD::FLOG, VT, Expand); in addMVEVectorTypes() 878 setOperationAction(ISD::FLOG, MVT::v2f64, Expand); in ARMTargetLowering() 899 setOperationAction(ISD::FLOG, MVT::v4f32, Expand); in ARMTargetLowering() 915 setOperationAction(ISD::FLOG, MVT::v2f32, Expand); in ARMTargetLowering() 1048 setOperationAction(ISD::FLOG, MVT::f64, Expand); in ARMTargetLowering() 1529 setOperationAction(ISD::FLOG, MVT::f16, Promote); in ARMTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 151 setOperationAction(ISD::FLOG, MVT::f16, Promote); in MipsSETargetLowering()
|
| D | MipsISelLowering.cpp | 427 setOperationAction(ISD::FLOG, MVT::f32, Expand); in MipsTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1635 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 400 setOperationAction(ISD::FLOG, MVT::f64, Custom); in PPCTargetLowering() 406 setOperationAction(ISD::FLOG, MVT::f32, Custom); in PPCTargetLowering() 840 setOperationAction(ISD::FLOG, VT, Expand); in PPCTargetLowering() 11303 case ISD::FLOG: return lowerLog(Op, DAG); in LowerOperation()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 370 ISD::FEXP2, ISD::FLOG, ISD::FLOG2, ISD::FLOG10}, in RISCVTargetLowering() 733 setOperationAction(ISD::FLOG, VT, Expand); in RISCVTargetLowering()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 651 ISD::FEXP, ISD::FEXP2, ISD::FLOG, in AArch64TargetLowering() 1407 setOperationAction(ISD::FLOG, VT, Expand); in AArch64TargetLowering() 1563 setOperationAction(ISD::FLOG, VT, Expand); in addTypeForNEON()
|