| /openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.h | 100 int64_t &CmpValue) const override;
106 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| D | LanaiInstrInfo.cpp | 179 int64_t &CmpValue) const { in analyzeCompare()
188 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
194 CmpValue = 0; in analyzeCompare()
285 int64_t /*CmpMask*/, int64_t CmpValue, in optimizeCompareInstr() argument
308 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
331 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &*I)) { in optimizeCompareInstr()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 245 int64_t &CmpValue) const override;
249 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
363 int CmpValue, const MachineRegisterInfo &MRI) const;
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| D | AArch64InstrInfo.cpp | 1117 int64_t &CmpValue) const { in analyzeCompare()
1133 CmpValue = 0; in analyzeCompare()
1151 CmpValue = 0; in analyzeCompare()
1160 CmpValue = MI.getOperand(2).getImm(); in analyzeCompare()
1169 CmpValue = AArch64_AM::decodeLogicalImmediate( in analyzeCompare()
1462 int64_t CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
1498 if (CmpValue == 0 && substituteCmpToZero(CmpInstr, SrcReg, *MRI)) in optimizeCompareInstr()
1500 return (CmpValue == 0 || CmpValue == 1) && in optimizeCompareInstr()
1501 removeCmpToZeroOrOne(CmpInstr, SrcReg, CmpValue, *MRI); in optimizeCompareInstr()
1753 int CmpValue, const TargetRegisterInfo &TRI, in canCmpInstrBeRemoved() argument
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 527 int64_t &CmpValue) const override;
533 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| D | X86InstrInfo.cpp | 3976 int64_t &CmpValue) const { in analyzeCompare()
3990 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
3992 CmpMask = CmpValue = 0; in analyzeCompare()
4003 CmpValue = 0; in analyzeCompare()
4012 CmpValue = 0; in analyzeCompare()
4025 CmpValue = MI.getOperand(2).getImm(); in analyzeCompare()
4027 CmpMask = CmpValue = 0; in analyzeCompare()
4037 CmpValue = 0; in analyzeCompare()
4049 CmpValue = 0; in analyzeCompare()
4313 int64_t CmpValue, in optimizeCompareInstr() argument
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 293 int64_t &CmpValue) const override;
300 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| D | ARMBaseInstrInfo.cpp | 2803 int64_t &CmpValue) const { in analyzeCompare()
2812 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
2820 CmpValue = 0; in analyzeCompare()
2827 CmpValue = 0; in analyzeCompare()
3029 int64_t CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
3070 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
3127 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &Instr, in optimizeCompareInstr()
3316 int64_t CmpMask, CmpValue; in shouldSink() local
3319 analyzeCompare(*Next, SrcReg, SrcReg2, CmpMask, CmpValue) && in shouldSink()
3320 isRedundantFlagInstr(&*Next, SrcReg, SrcReg2, CmpValue, &MI, IsThumb1)) in shouldSink()
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 628 int64_t CmpMask, CmpValue; in optimizeCmpInstr() local
629 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
635 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 328 int64_t &CmpValue) const override;
331 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| D | SIInstrInfo.cpp | 8506 int64_t &CmpValue) const { in analyzeCompare()
8532 CmpValue = 0; in analyzeCompare()
8535 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
8555 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
8565 int64_t CmpValue, in optimizeCompareInstr() argument
8570 if (SrcReg2 && !getFoldableImm(SrcReg2, *MRI, CmpValue)) in optimizeCompareInstr()
8573 const auto optimizeCmpAnd = [&CmpInstr, SrcReg, CmpValue, MRI, in optimizeCompareInstr()
8632 if (CmpValue != ExpectedValue) { in optimizeCompareInstr()
8635 IsReversedCC = CmpValue == (ExpectedValue ^ Mask); in optimizeCompareInstr()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 1455 int64_t CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local
1457 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 2777 int64_t CmpMask, CmpValue; in optimizeCmpPostRA() local
2778 if (!analyzeCompare(CmpMI, SrcReg, SrcReg2, CmpMask, CmpValue)) in optimizeCmpPostRA()
2782 if (CmpValue || !CmpMask || SrcReg2) in optimizeCmpPostRA()
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