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Searched refs:CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h1482 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h1912 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h2434 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT 0x0 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11261 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_9_4_3_sh_mask.h14464 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_9_1_sh_mask.h12737 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_9_2_1_sh_mask.h12522 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_9_4_2_sh_mask.h2657 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_11_5_0_sh_mask.h12435 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_11_0_0_sh_mask.h15743 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_12_0_0_sh_mask.h12152 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_11_0_3_sh_mask.h17934 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_10_1_0_sh_mask.h18226 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro
Dgc_10_3_0_sh_mask.h16574 #define CP_PQ_WPTR_POLL_CNTL__PERIOD__SHIFT … macro