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Searched refs:CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK (Results 1 – 14 of 14) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h3287 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK 0xffff macro
Dgfx_8_0_sh_mask.h3885 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK 0xffff macro
Dgfx_8_1_sh_mask.h4407 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK 0xffff macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12798 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_9_4_3_sh_mask.h16326 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_9_1_sh_mask.h14098 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_9_2_1_sh_mask.h13963 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_9_4_2_sh_mask.h3894 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_11_5_0_sh_mask.h13959 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_11_0_0_sh_mask.h17265 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_12_0_0_sh_mask.h13165 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_11_0_3_sh_mask.h19504 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_10_1_0_sh_mask.h20205 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro
Dgc_10_3_0_sh_mask.h18360 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI_MASK … macro