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Searched refs:CP_GFX_HPD_CONTROL0__PIPE_HOLDING_MASK (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h13272 #define CP_GFX_HPD_CONTROL0__PIPE_HOLDING_MASK … macro
Dgc_11_0_0_sh_mask.h16578 #define CP_GFX_HPD_CONTROL0__PIPE_HOLDING_MASK … macro
Dgc_12_0_0_sh_mask.h12581 #define CP_GFX_HPD_CONTROL0__PIPE_HOLDING_MASK … macro
Dgc_11_0_3_sh_mask.h18821 #define CP_GFX_HPD_CONTROL0__PIPE_HOLDING_MASK … macro
Dgc_10_1_0_sh_mask.h19113 #define CP_GFX_HPD_CONTROL0__PIPE_HOLDING_MASK … macro
Dgc_10_3_0_sh_mask.h17463 #define CP_GFX_HPD_CONTROL0__PIPE_HOLDING_MASK … macro