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Searched refs:CP_DMA_WATCH0_CNTL__RSVD1__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h13513 #define CP_DMA_WATCH0_CNTL__RSVD1__SHIFT … macro
Dgc_11_0_0_sh_mask.h16819 #define CP_DMA_WATCH0_CNTL__RSVD1__SHIFT … macro
Dgc_12_0_0_sh_mask.h12821 #define CP_DMA_WATCH0_CNTL__RSVD1__SHIFT … macro
Dgc_11_0_3_sh_mask.h19062 #define CP_DMA_WATCH0_CNTL__RSVD1__SHIFT … macro
Dgc_10_1_0_sh_mask.h19363 #define CP_DMA_WATCH0_CNTL__RSVD1__SHIFT … macro
Dgc_10_3_0_sh_mask.h17716 #define CP_DMA_WATCH0_CNTL__RSVD1__SHIFT … macro