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Searched refs:CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h2264 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h2810 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h3332 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT 0x0 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h26918 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro
Dgc_11_0_0_sh_mask.h30880 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro
Dgc_12_0_0_sh_mask.h17958 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro
Dgc_11_0_3_sh_mask.h33489 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro
Dgc_10_1_0_sh_mask.h30889 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro
Dgc_10_3_0_sh_mask.h29137 #define CPC_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro