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Searched refs:CHC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h28593 #define CHC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_11_0_0_sh_mask.h32748 #define CHC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_12_0_0_sh_mask.h18578 #define CHC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_11_0_3_sh_mask.h35246 #define CHC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_10_1_0_sh_mask.h32157 #define CHC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_10_3_0_sh_mask.h30583 #define CHC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro