Searched refs:Banks (Results 1 – 14 of 14) sorted by relevance
108 const std::vector<RegisterBank> &Banks);110 const std::vector<RegisterBank> &Banks);112 std::vector<RegisterBank> &Banks);126 const std::vector<RegisterBank> &Banks) { in emitHeader() argument134 for (const auto &Bank : Banks) in emitHeader()145 const std::vector<RegisterBank> &Banks) { in emitBaseClassDefinition() argument212 std::vector<RegisterBank> &Banks) { in emitBaseClassImplementation() argument217 for (const auto &Bank : Banks) { in emitBaseClassImplementation()241 for (const auto &Bank : Banks) { in emitBaseClassImplementation()258 for (const auto &Bank : Banks) in emitBaseClassImplementation()[all …]
1 //=- ARMRegisterBank.td - Describe the AArch64 Banks ---------*- tablegen -*-=//
1 //=- X86RegisterBank.td - Describe the X86 Banks -------------*- tablegen -*-=//
1 //=- AArch64RegisterBank.td - Describe the AArch64 Banks -----*- tablegen -*-=//
1 //=- AMDGPURegisterBank.td - Describe the AMDGPU Banks -------*- tablegen -*-=//
29 * **Banks**: ``addRegBankCoverage`` --- which register bank covers each
100 instructions. Register Banks are a means to constrain the register allocator to118 In summary, Register Banks are a means of disambiguating between seemingly
73 Justin Banks <justinb@wamnet.com>
776 Justin Banks <justinb@cray.com>
667 * Banks
17146 * Banks22171 -- Nancy Banks Smith25560 -- Russell Banks
12218 Banks of the Jordan!
15507 36005:Banks, AL15549 36061:Banks, AL16755 38661:Red Banks, MS31430 71631:Banks, AR36478 83602:Banks, ID41017 97106:Banks, OR41035 97125:Banks, OR
4998 =head2 v5.13.2 - Iain M Banks, "Use of Weapons"