| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 838 class BSWAP<bits<32> SizeOp, string OpcodeStr, BPFSrcType SrcType, list<dag> Pattern>
854 def BE16 : BSWAP<16, "be16", BPF_TO_BE, [(set GPR:$dst, (srl (bswap GPR:$src), (i64 48)))]>;
855 def BE32 : BSWAP<32, "be32", BPF_TO_BE, [(set GPR:$dst, (srl (bswap GPR:$src), (i64 32)))]>;
856 def BE64 : BSWAP<64, "be64", BPF_TO_BE, [(set GPR:$dst, (bswap GPR:$src))]>;
859 def LE16 : BSWAP<16, "le16", BPF_TO_LE, [(set GPR:$dst, (srl (bswap GPR:$src), (i64 48)))]>;
860 def LE32 : BSWAP<32, "le32", BPF_TO_LE, [(set GPR:$dst, (srl (bswap GPR:$src), (i64 32)))]>;
861 def LE64 : BSWAP<64, "le64", BPF_TO_LE, [(set GPR:$dst, (bswap GPR:$src))]>;
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| D | BPFISelLowering.cpp | 123 setOperationAction(ISD::BSWAP, MVT::i32, Promote); in BPFTargetLowering()
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| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 700 BSWAP, enumerator
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| D | BasicTTIImpl.h | 2102 ISD = ISD::BSWAP; in getTypeBasedIntrinsicInstrCost()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 3395 { ISD::BSWAP, MVT::v8i64, { 1 } }, in getIntrinsicInstrCost()
3396 { ISD::BSWAP, MVT::v16i32, { 1 } }, in getIntrinsicInstrCost()
3397 { ISD::BSWAP, MVT::v32i16, { 1 } }, in getIntrinsicInstrCost()
3463 { ISD::BSWAP, MVT::v8i64, { 4 } }, in getIntrinsicInstrCost()
3464 { ISD::BSWAP, MVT::v16i32, { 4 } }, in getIntrinsicInstrCost()
3465 { ISD::BSWAP, MVT::v32i16, { 4 } }, in getIntrinsicInstrCost()
3595 { ISD::BSWAP, MVT::v4i64, { 1 } }, in getIntrinsicInstrCost()
3596 { ISD::BSWAP, MVT::v8i32, { 1 } }, in getIntrinsicInstrCost()
3597 { ISD::BSWAP, MVT::v16i16, { 1 } }, in getIntrinsicInstrCost()
3670 { ISD::BSWAP, MVT::v4i64, { 4 } }, in getIntrinsicInstrCost()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 146 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in Mips16TargetLowering()
147 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in Mips16TargetLowering()
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| D | MipsISelLowering.cpp | 470 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in MipsTargetLowering()
472 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in MipsTargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1571 setOperationAction(ISD::BSWAP, MVT::i32, Legal); in HexagonTargetLowering()
1572 setOperationAction(ISD::BSWAP, MVT::i64, Legal); in HexagonTargetLowering()
1631 ISD::CTPOP, ISD::CTLZ, ISD::CTTZ, ISD::BSWAP, ISD::BITREVERSE, in HexagonTargetLowering()
1706 setOperationAction(ISD::BSWAP, NativeVT, Legal); in HexagonTargetLowering()
2296 SDValue T1 = DAG.getNode(ISD::BSWAP, dl, MVT::i32, T0); in LowerVECTOR_SHUFFLE()
2323 SDValue T1 = DAG.getNode(ISD::BSWAP, dl, MVT::i64, T0); in LowerVECTOR_SHUFFLE()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 662 ISD::BSWAP, in SystemZTargetLowering()
6409 Op1.getOpcode() == ISD::BSWAP && in combineSTORE()
6579 if (Op.getOpcode() == ISD::BSWAP && Op.hasOneUse()) { in combineEXTRACT_VECTOR_ELT()
6585 Op = DAG.getNode(ISD::BSWAP, SDLoc(N), EltVT, Op); in combineEXTRACT_VECTOR_ELT()
6844 Vec.getOpcode() == ISD::BSWAP || Vec.isUndef() || in combineBSWAP()
6846 Elt.getOpcode() == ISD::BSWAP || Elt.isUndef() || in combineBSWAP()
6859 Vec = DAG.getNode(ISD::BSWAP, SDLoc(N), VecVT, Vec); in combineBSWAP()
6861 Elt = DAG.getNode(ISD::BSWAP, SDLoc(N), EltVT, Elt); in combineBSWAP()
6875 Op0.getOpcode() == ISD::BSWAP || Op0.isUndef() || in combineBSWAP()
6877 Op1.getOpcode() == ISD::BSWAP || Op1.isUndef()) { in combineBSWAP()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 981 Victim = DAG.getNode(ISD::BSWAP, dl, VT, Victim); in LowerShifts()
986 Victim = DAG.getNode(ISD::BSWAP, dl, VT, Victim); in LowerShifts()
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 343 case ISD::BSWAP: in LegalizeOp()
730 case ISD::BSWAP: in Expand()
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| D | SelectionDAGDumper.cpp | 436 case ISD::BSWAP: return "bswap"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 63 case ISD::BSWAP: Res = PromoteIntRes_BSWAP(N); break; in PromoteIntegerResult()
503 !TLI.isOperationLegalOrCustomOrPromote(ISD::BSWAP, NVT)) { in PromoteIntRes_BSWAP()
509 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), in PromoteIntRes_BSWAP()
2422 case ISD::BSWAP: ExpandIntRes_BSWAP(N, Lo, Hi); break; in ExpandIntegerResult()
3267 Lo = DAG.getNode(ISD::BSWAP, dl, Lo.getValueType(), Lo); in ExpandIntRes_BSWAP()
3268 Hi = DAG.getNode(ISD::BSWAP, dl, Hi.getValueType(), Hi); in ExpandIntRes_BSWAP()
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| D | DAGCombiner.cpp | 1744 case ISD::BSWAP: return visitBSWAP(N); in visit()
5390 if (HandOpcode == ISD::BSWAP) { in hoistLogicOpWithSameOpcodeHands()
6666 if (!TLI.isOperationLegalOrCustom(ISD::BSWAP, VT)) in MatchBSwapHWordLow()
6764 SDValue Res = DAG.getNode(ISD::BSWAP, SDLoc(N), VT, N00); in MatchBSwapHWordLow()
6870 if (N.getOpcode() == ISD::SRL && N.getOperand(0).getOpcode() == ISD::BSWAP) { in isBSwapHWordPair()
6918 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, Shift0.getOperand(0)); in matchBSwapHWordOrAndAnd()
6936 if (!TLI.isOperationLegalOrCustom(ISD::BSWAP, VT)) in MatchBSwapHWord()
6977 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT, in MatchBSwapHWord()
8057 case ISD::BSWAP: in calculateByteProvider()
8343 SourceValue = DAG.getNode(ISD::BSWAP, DL, WideVT, SourceValue); in mergeTruncStores()
[all …]
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| D | SelectionDAG.cpp | 3751 case ISD::BSWAP: { in computeKnownBits()
4744 case ISD::BSWAP: in canCreateUndefOrPoison()
5224 case ISD::BSWAP: in getNode()
5351 case ISD::BSWAP: in getNode()
5528 case ISD::BSWAP: in getNode()
5536 if (OpOpcode == ISD::BSWAP) in getNode()
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| D | LegalizeVectorTypes.cpp | 80 case ISD::BSWAP: in ScalarizeVectorResult()
1017 case ISD::BSWAP: in SplitVectorResult()
4103 case ISD::BSWAP: in WidenVectorResult()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 458 setOperationAction(ISD::BSWAP, MVT::i32, Legal); in PPCTargetLowering()
459 setOperationAction(ISD::BSWAP, MVT::i64, Legal); in PPCTargetLowering()
461 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in PPCTargetLowering()
463 ISD::BSWAP, MVT::i64, in PPCTargetLowering()
864 setOperationAction(ISD::BSWAP, VT, Expand); in PPCTargetLowering()
1237 setOperationAction(ISD::BSWAP, MVT::v8i16, Legal); in PPCTargetLowering()
1238 setOperationAction(ISD::BSWAP, MVT::v4i32, Legal); in PPCTargetLowering()
1239 setOperationAction(ISD::BSWAP, MVT::v2i64, Legal); in PPCTargetLowering()
1240 setOperationAction(ISD::BSWAP, MVT::v1i128, Legal); in PPCTargetLowering()
1377 setTargetDAGCombine({ISD::BSWAP, ISD::INTRINSIC_WO_CHAIN, in PPCTargetLowering()
[all …]
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| /openbsd/src/gnu/llvm/llvm/docs/ |
| D | ExtendingLLVM.rst | 121 well. For a good example, see ``ISD::BSWAP``, which promotes its operand to
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| /openbsd/src/sys/dev/pci/bktr/ |
| D | bktr_core.c | 266 #define BSWAP (BT848_COLOR_CTL_BSWAP_ODD | BT848_COLOR_CTL_BSWAP_EVEN) macro
3524 swapf = swap_bytes ? 0 : BSWAP; in pixfmt_swap_flags()
3531 swapf = swap_bytes ? 0 : BSWAP; in pixfmt_swap_flags()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 460 setOperationAction(ISD::BSWAP, MVT::i16, Expand); in NVPTXTargetLowering()
461 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in NVPTXTargetLowering()
462 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in NVPTXTargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 125 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in LanaiTargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/ |
| D | VEISelLowering.cpp | 189 setOperationAction(ISD::BSWAP, IntVT, Legal); in initSPUActions()
2915 case ISD::BSWAP: in isI32Insn()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1714 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in SparcTargetLowering()
1783 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in SparcTargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 120 setOperationAction(ISD::BSWAP, MVT::i16, Expand); in AVRTargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 143 {ISD::BSWAP, ISD::SMUL_LOHI, ISD::UMUL_LOHI, ISD::MULHS, ISD::MULHU, in WebAssemblyTargetLowering()
|