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Searched refs:BIF_VDDGFX_RSV2_LOWER__VDDGFX_RSV2_REG_LOWER__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_sh_mask.h2428 #define BIF_VDDGFX_RSV2_LOWER__VDDGFX_RSV2_REG_LOWER__SHIFT macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/bif/
Dbif_5_0_sh_mask.h660 #define BIF_VDDGFX_RSV2_LOWER__VDDGFX_RSV2_REG_LOWER__SHIFT 0x2 macro
Dbif_5_1_sh_mask.h628 #define BIF_VDDGFX_RSV2_LOWER__VDDGFX_RSV2_REG_LOWER__SHIFT 0x2 macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/nbio/
Dnbio_7_0_sh_mask.h117976 #define BIF_VDDGFX_RSV2_LOWER__VDDGFX_RSV2_REG_LOWER__SHIFT macro
Dnbio_6_1_sh_mask.h17700 #define BIF_VDDGFX_RSV2_LOWER__VDDGFX_RSV2_REG_LOWER__SHIFT macro