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Searched refs:BIF_CFG_DEV1_RC0_SECONDARY_STATUS__DEVSEL_TIMING__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/nbio/
Dnbio_7_11_0_sh_mask.h36216 #define BIF_CFG_DEV1_RC0_SECONDARY_STATUS__DEVSEL_TIMING__SHIFT … macro
Dnbio_7_0_sh_mask.h1929 #define BIF_CFG_DEV1_RC0_SECONDARY_STATUS__DEVSEL_TIMING__SHIFT … macro
Dnbio_7_2_0_sh_mask.h37412 #define BIF_CFG_DEV1_RC0_SECONDARY_STATUS__DEVSEL_TIMING__SHIFT … macro
Dnbio_7_7_0_sh_mask.h33475 #define BIF_CFG_DEV1_RC0_SECONDARY_STATUS__DEVSEL_TIMING__SHIFT … macro